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[109.80.100.85]) by smtp.gmail.com with ESMTPSA id gk8-v6sm4174872ejb.42.2019.01.18.07.56.48 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 18 Jan 2019 07:56:48 -0800 (PST) Date: Fri, 18 Jan 2019 16:56:38 +0100 From: Andrea Parri To: Alan Stern Cc: LKMM Maintainers -- Akira Yokosawa , Boqun Feng , Daniel Lustig , David Howells , Jade Alglave , Luc Maranget , Nicholas Piggin , "Paul E. McKenney" , Peter Zijlstra , Will Deacon , Dmitry Vyukov , Nick Desaulniers , linux-kernel@vger.kernel.org Subject: Re: Plain accesses and data races in the Linux Kernel Memory Model Message-ID: <20190118155638.GA24442@andrea> References: <20190117150336.GA10381@andrea> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jan 18, 2019 at 10:10:22AM -0500, Alan Stern wrote: > On Thu, 17 Jan 2019, Andrea Parri wrote: > > > > Can the compiler (maybe, it does?) transform, at the C or at the "asm" > > > level, LB1's P0 in LB2's P0 (LB1 and LB2 are reported below)? > > > > > > C LB1 > > > > > > { > > > int *x = &a; > > > } > > > > > > P0(int **x, int *y) > > > { > > > int *r0; > > > > > > r0 = rcu_dereference(*x); > > > *r0 = 0; > > > smp_wmb(); > > > WRITE_ONCE(*y, 1); > > > } > > > > > > P1(int **x, int *y, int *b) > > > { > > > int r0; > > > > > > r0 = READ_ONCE(*y); > > > rcu_assign_pointer(*x, b); > > > } > > > > > > exists (0:r0=b /\ 1:r0=1) > > > > > > > > > C LB2 > > > > > > { > > > int *x = &a; > > > } > > > > > > P0(int **x, int *y) > > > { > > > int *r0; > > > > > > r0 = rcu_dereference(*x); > > > if (*r0) > > > *r0 = 0; > > > smp_wmb(); > > > WRITE_ONCE(*y, 1); > > > } > > > > > > P1(int **x, int *y, int *b) > > > { > > > int r0; > > > > > > r0 = READ_ONCE(*y); > > > rcu_assign_pointer(*x, b); > > > } > > > > > > exists (0:r0=b /\ 1:r0=1) > > > > > > LB1 and LB2 are data-race free, according to the patch; LB1's "exists" > > > clause is not satisfiable, while LB2's "exists" clause is satisfiable. > > A relatively simple solution to this problem would be to say that > smp_wmb doesn't order plain writes. It seems so; I don't have other solutions to suggest ATM. (But, TBH, I'm still in the process of reviewing/testing these changes... ) And yes, this is a pain! : I don't have the exact statistics, but I'm willing to believe that removing this order will take us back ~99% of the current (~500!) uses of smp_wmb() ;-/ Oh, well, maybe we'll find a better solution one day: after all, that one doesn't seem worse than what the current LKMM has to say! ;-) > > I think the rest of the memory model would then be okay. However, I am > open to arguments that this approach is too complex and we should > insist on the same kind of strict ordering for race avoidance that the > C11 standard uses (i.e., conflicting accesses separated by full memory > barriers or release & acquire barriers or locking). Indeed; maybe, we've just found another reason to obsolete smp_wmb()! ;-) Andrea > > Alan >