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Subject: Re: [RFC PATCH v2 2/4] arm64: dts: qcom: msm8998: Add UFS nodes
To:     Jeffrey Hugo <jhugo@codeaurora.org>,
        MSM <linux-arm-msm@vger.kernel.org>
Cc:     LKML <linux-kernel@vger.kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Andy Gross <andy.gross@linaro.org>,
        Rob Herring <robh+dt@kernel.org>
References: <88e04336-723f-c157-0384-c5054a73e0a4@free.fr>
 <d183a99d-6fd7-8b06-3f22-a26415cf4967@free.fr>
 <8dd04fdc-a5ad-420f-5224-641a71b3176c@codeaurora.org>
From:   Marc Gonzalez <marc.w.gonzalez@free.fr>
Message-ID: <9aba81b6-e202-019c-f0f3-60c07935fa43@free.fr>
Date:   Mon, 21 Jan 2019 18:15:06 +0100
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On 16/01/2019 16:36, Jeffrey Hugo wrote:

> On 1/16/2019 3:56 AM, Marc Gonzalez wrote:
>
>> Add host controller and PHY DT nodes.
>>
>> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
>> ---
>> TODO: check whether the driver uses the 'resets' prop
>> ---
>>   arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi | 20 +++++++
>>   arch/arm64/boot/dts/qcom/msm8998.dtsi     | 63 +++++++++++++++++++++++
>>   2 files changed, 83 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
>> index 50e9033aa7f6..cd1c9e84eab7 100644
>> --- a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
>> @@ -257,3 +257,23 @@
>>   	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on  &sdc2_data_on  &sdc2_cd_on>;
>>   	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
>>   };
>> +
>> +&ufshc {
>> +	vdd-hba-fixed-regulator;
> 
> Since we are not specifying the vdd anymore, I suspect this should be 
> dropped.  Do you know of any reason why we'd still need it?

Will drop in v3.

>> diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
>> index 6f4f4b79853b..36fd2e614464 100644
>> --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
>> @@ -711,6 +711,69 @@
>>   			redistributor-stride = <0x0 0x20000>;
>>   			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
>>   		};
>> +
>> +		ufshc: ufshc@1da4000 {
>> +			compatible = "qcom,msm8998-ufshc", "qcom,ufshc",
>> +				     "jedec,ufs-2.0";
>> +			reg = <0x1da4000 0x2500>;
> 
> Bjorn would like it if reg addresses are full width, ie 0x01da4000

Will tweak in v3.

>> +		ufsphy: phy@1da7000 {
>> +			compatible = "qcom,sdm845-qmp-ufs-phy";
> 
> We should make an 8998 compatible.  Also, don't you have phy changes 
> since the init sequence differs between 845 and 8998?

Will create a specific binding.
I don't have any PHY changes, I just used the 845 init sequence.
I tested this by using the 845 init sequence downstream.

However, no point in sending v3 until someone comments on patches 3 and 4 :-)

Patch 4 needs to become a real patch.

Regards.