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[209.132.180.67]) by mx.google.com with ESMTP id z18si13113758pgk.367.2019.01.21.22.41.17; Mon, 21 Jan 2019 22:41:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727070AbfAVGjS (ORCPT + 99 others); Tue, 22 Jan 2019 01:39:18 -0500 Received: from inva021.nxp.com ([92.121.34.21]:35202 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726853AbfAVGjP (ORCPT ); Tue, 22 Jan 2019 01:39:15 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 9D95C2003C6; Tue, 22 Jan 2019 07:39:13 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 132322001FA; Tue, 22 Jan 2019 07:39:04 +0100 (CET) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 532DE402A9; Tue, 22 Jan 2019 14:38:52 +0800 (SGT) From: Xiaowei Bao To: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, leoyang.li@nxp.com, kishon@ti.com, lorenzo.pieralisi@arm.com, arnd@arndb.de, gregkh@linuxfoundation.org, minghuan.Lian@nxp.com, mingkai.hu@nxp.com, roy.zang@nxp.com, kstewart@linuxfoundation.org, cyrille.pitchen@free-electrons.com, pombredanne@nexb.com, shawn.lin@rock-chips.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org Cc: Xiaowei Bao Subject: [PATCHv6 2/4] arm64: dts: Add the PCIE EP node in dts Date: Tue, 22 Jan 2019 14:33:26 +0800 Message-Id: <20190122063328.25228-2-xiaowei.bao@nxp.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190122063328.25228-1-xiaowei.bao@nxp.com> References: <20190122063328.25228-1-xiaowei.bao@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the PCIE EP node in dts for ls1046a. Signed-off-by: Xiaowei Bao Reviewed-by: Minghuan Lian Reviewed-by: Zhiqiang Hou Reviewed-by: Rob Herring --- v2: - Add the SoC specific compatibles. v3: - no change v4: - no change v5: - change the OB win number due to the RM update. v6: - no change arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 34 +++++++++++++++++++++++- 1 files changed, 33 insertions(+), 1 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 0e762ca..cb71850 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -666,6 +666,17 @@ status = "disabled"; }; + pcie_ep@3400000 { + compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep"; + reg = <0x00 0x03400000 0x0 0x00100000 + 0x40 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ib-windows = <6>; + num-ob-windows = <8>; + num-lanes = <2>; + status = "disabled"; + }; + pcie@3500000 { compatible = "fsl,ls1046a-pcie"; reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ @@ -693,6 +704,17 @@ status = "disabled"; }; + pcie_ep@3500000 { + compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep"; + reg = <0x00 0x03500000 0x0 0x00100000 + 0x48 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ib-windows = <6>; + num-ob-windows = <8>; + num-lanes = <2>; + status = "disabled"; + }; + pcie@3600000 { compatible = "fsl,ls1046a-pcie"; reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ @@ -720,6 +742,17 @@ status = "disabled"; }; + pcie_ep@3600000 { + compatible = "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03600000 0x0 0x00100000 + 0x50 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ib-windows = <6>; + num-ob-windows = <8>; + num-lanes = <2>; + status = "disabled"; + }; + qdma: dma-controller@8380000 { compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma"; reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */ @@ -740,7 +773,6 @@ queue-sizes = <64 64>; big-endian; }; - }; reserved-memory { -- 1.7.1