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[209.132.180.67]) by mx.google.com with ESMTP id b65si14969470pgc.259.2019.01.21.22.44.08; Mon, 21 Jan 2019 22:44:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=g6aGIRLh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726986AbfAVGlG (ORCPT + 99 others); Tue, 22 Jan 2019 01:41:06 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:33072 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725862AbfAVGlF (ORCPT ); Tue, 22 Jan 2019 01:41:05 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0M6etBH069756; Tue, 22 Jan 2019 00:40:55 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1548139255; bh=DMQ7Uwy/wf4VvaKl/LJ40u2j8kzqJifQG3nDMdCys7M=; h=From:To:CC:Subject:Date; b=g6aGIRLhbhWP9ah+ssK2Grq9WnyVMR945P6vFZ3LBaEE24McW2UFEJlY+8aAa6zEt dYiJnxB7NWoIDSDAmyUm4qn/29xsUvj3pG/vrMYy2XGGjDmaTKdunvQ/9zd9nOuioF n0xZflCFbT+WPtbOxYcMaZZqzy8D3pBjS1sv+Wh8= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0M6et76116913 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 22 Jan 2019 00:40:55 -0600 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Tue, 22 Jan 2019 00:40:55 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Tue, 22 Jan 2019 00:40:55 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0M6eqrr019930; Tue, 22 Jan 2019 00:40:53 -0600 From: Vignesh R To: Boris Brezillon , CC: Marek Vasut , Rob Herring , , , , Vignesh R Subject: [PATCH v4 0/2] cadence-quadspi: Add Octal mode support Date: Tue, 22 Jan 2019 12:11:35 +0530 Message-ID: <20190122064137.17114-1-vigneshr@ti.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series adds support for OSPI version of Cadence QSPI controller IP. Tested with AM654 EVM with MT35x512 Octal flash Changes: v4: Fix comments on v3 by Tudor. Rebase on top latest linux-next(all dependencies are now part of -next) v3: Rebase on top of v7 of Yogesh's series[1] v2: spi-nor core patches dropped, are now part of Yogesh's series [1] Declare Octal mode capability based on compatible. Vignesh R (2): dt-bindings: cadence-quadspi: Add new compatible for AM654 SoC mtd: spi-nor: cadence-quadspi: Add support for Octal SPI controller .../bindings/mtd/cadence-quadspi.txt | 1 + drivers/mtd/spi-nor/cadence-quadspi.c | 53 ++++++++++++++----- 2 files changed, 42 insertions(+), 12 deletions(-) -- 2.20.1