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[209.132.180.67]) by mx.google.com with ESMTP id j34si14956657pgj.557.2019.01.22.00.45.36; Tue, 22 Jan 2019 00:45:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VRWjb9rb; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727318AbfAVIoN (ORCPT + 99 others); Tue, 22 Jan 2019 03:44:13 -0500 Received: from mail-lj1-f195.google.com ([209.85.208.195]:46932 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727201AbfAVIoN (ORCPT ); Tue, 22 Jan 2019 03:44:13 -0500 Received: by mail-lj1-f195.google.com with SMTP id v15-v6so19776726ljh.13 for ; Tue, 22 Jan 2019 00:44:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=wd+IFHRFSGZybgssa5Rga5Q6TfQk8CSgVm/c12T9/0A=; b=VRWjb9rbVKrA7F6udNsiotHdlr+cRtBmRO70ZktTHSXbxm2xsck2S9bhqm7SW7ZQhC N7KKq/i8igdTnCG7tjvSUDmaFbAQvoeYDeBZlTioLcYYYKsjEwyP0F7YO27wDkIGXK4Z IrgSbGM4S+qYc4Rstasxg3tNIpA6Hi8rupsUQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=wd+IFHRFSGZybgssa5Rga5Q6TfQk8CSgVm/c12T9/0A=; b=oVgmAPRRbTBJQ+Z6pX1lR2IaGJQw1jNgLRtgFqtidYPXTTTcsYh5RJA9/QdIfxe4IE inizGibdGa5qj42co59ScHuaT6Q6h4FUOrCyapq+ml4IDs0xrsjyMP5xE7Xif39/8GAY 2+Twvdyd2cLZQlGkerBCLCuaYORxh/0KURSNTFPfs+LQCuNPzFThZewrPEUNf9RodX5i i30m2/cGHAzwjFPW1bOiNp8lTklN33M5uvpEecS32tbHRJcdVZ7Wo3zt9ZdhqfXXfW40 Z0O2qcK5nw62TR2hV3BJ8u5kGwsLzSqux9/ggYOLW1qyt6Ega3jKL4B7tQTcSGwO04+E v7sw== X-Gm-Message-State: AJcUukdQFeb6XtxDfxbSEsyDeTIcJeYbuz8Uc4EZj2aVB4lXVbQ0SCU0 Romorj47Mc/zteYazXFwHvk1lQ9uj9V0EbSK2Vw0sA== X-Received: by 2002:a2e:5854:: with SMTP id x20-v6mr19401216ljd.31.1548146651061; Tue, 22 Jan 2019 00:44:11 -0800 (PST) MIME-Version: 1.0 References: <7538d5806003b8f67e7e0d35638315974b7c2b50.1547559542.git.baolin.wang@linaro.org> In-Reply-To: From: Baolin Wang Date: Tue, 22 Jan 2019 16:43:58 +0800 Message-ID: Subject: Re: [PATCH 3/4] dt-bindings: spi: Add the DMA properties for the SPI dma mode To: Geert Uytterhoeven Cc: Rob Herring , Mark Brown , Mark Rutland , Orson Zhai , Lyra Zhang , lanqing.liu@unisoc.com, linux-spi , DTML , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Geert, On Tue, 22 Jan 2019 at 16:11, Geert Uytterhoeven wrote: > > Hi Baolin, > > On Tue, Jan 22, 2019 at 3:23 AM Baolin Wang wrote: > > On Mon, 21 Jan 2019 at 21:53, Rob Herring wrote: > > > On Tue, Jan 15, 2019 at 7:47 AM Baolin Wang wrote: > > > > From: Lanqing Liu > > > > > > The email address should be updated with unisoc.com. > > > > Sure. > > > > > > > > > Add the DMA properties for the SPI dma mode. > > > > > > > > Signed-off-by: Lanqing Liu > > > > Signed-off-by: Baolin Wang > > > > --- > > > > Documentation/devicetree/bindings/spi/spi-sprd.txt | 9 +++++++++ > > > > 1 file changed, 9 insertions(+) > > > > > > > > diff --git a/Documentation/devicetree/bindings/spi/spi-sprd.txt b/Documentation/devicetree/bindings/spi/spi-sprd.txt > > > > index bad211a..01ef53f 100644 > > > > --- a/Documentation/devicetree/bindings/spi/spi-sprd.txt > > > > +++ b/Documentation/devicetree/bindings/spi/spi-sprd.txt > > > > @@ -14,6 +14,12 @@ Required properties: > > > > address on the SPI bus. Should be set to 1. > > > > - #size-cells: Should be set to 0. > > > > > > > > +Optional properties: > > > > +dma-names: Should contain names of the SPI used DMA channel. > > > > +dmas: Should contain DMA channels which the SPI used sorted in the > > > > + same order as the dma-names property. > > > > +sprd,dma-slave-ids: Should contain the DMA number that the SPI hardware required. > > > > + > > > > Example: > > > > spi0: spi@70a00000{ > > > > compatible = "sprd,sc9860-spi"; > > > > @@ -21,6 +27,9 @@ spi0: spi@70a00000{ > > > > interrupts = ; > > > > clock-names = "spi", "source","enable"; > > > > clocks = <&clk_spi0>, <&ext_26m>, <&clk_ap_apb_gates 5>; > > > > + dma-names = "rx_chn", "tx_chn"; > > > > + dmas = <&apdma 11>, <&apdma 12>; > > > > + sprd,dma-slave-ids = <11 12>; > > > > > > When would this be different values from what's in 'dmas'? > > > > Slave id is not always same with the DMA channel number in 'dmas', and > > it is just coincident for SPI driver. Moreover for different SoC , the > > slave ids for DMA engine consumers are not same. So we need one > > property to specify the slave id for the consumers to trigger DMA > > transfer. > > Perhaps the DMA controller should use #dma-cells = <2>, so you can specify > the second value in the dmas property? Yes, that's a good point. I will try to change our DMA driver. Thanks. -- Baolin Wang Best Regards