Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp7236468imu; Tue, 22 Jan 2019 02:40:56 -0800 (PST) X-Google-Smtp-Source: ALg8bN7kYm0UGuS+WSfMU6YdzCU8ukMAmO/DGxXySpzKaIqZ3mQfMlLWb1X3UXmkBn02b8D8SNbE X-Received: by 2002:a63:658:: with SMTP id 85mr31321544pgg.373.1548153656000; Tue, 22 Jan 2019 02:40:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1548153655; cv=none; d=google.com; s=arc-20160816; b=tXeJVUNdWt2MotB5LXquOZ/veT/cPTbrtK6CtUcevoYF4ihbOrp9yn54+oUaoEAUE1 NrTYm31s2MUQ46+1yxk1dERDoPxdrP1iKX/Gm7VvoGthZMRtIpZtlSMZi/qM8oQkTD2H oOvEx2WmzifQuvMx++6GkcfnYfUiRKkeeW1WZOBuoisO9P+HTIy6LIphmhH2mwHM6KGf am5ScNP8h83V2CvOPUKX8/M4EpLWbn95lKcUudIQXXSNscXsXmGpu+e60RMek2UZYVwa Wb4XZrn1x34XhvjNG04SMVGMYsKZOJbICpgalX0UlCJ+K8/TcwIyRcqGT288N8mJor4H TDzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=KDk1M2U/dfb1nHi9F87pLsYWKDEymfExdgaDgTXp3Cc=; b=gvBYN0CqUdzlEM7l4ZtirUWYXMpBZXiy1WOxQ/UiUMs0RjA+EVwHYtpnYCT7+aKPGl CPhrlUXyid9XYO3M+jSH/2gCwtgdnGGO0WfcKl+3hpOheoTm99W/ueaFw0RmiUO6CS9a RSpikmK6uve7IjH+kgxaSrY2lYAYYwK4WX/V/tBi5CRRFQQm3j8KMnMjR/PxJOVziaAV 6uAvgRxrQdcke9IuWqUUbkpYbN0TY8rtlU33G1HLEFscLqzC3S1KCr25+bV0rYJ6b3rp GNp/+gBQrpNPrvAPiMf/k7eTFjtai0RsTpXdvj2aiW4WuRJWco/ru52JXASi/ntoNXM+ vR+A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=8bytes.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 59si15454859ple.291.2019.01.22.02.40.40; Tue, 22 Jan 2019 02:40:55 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=8bytes.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727604AbfAVKjT (ORCPT + 99 others); Tue, 22 Jan 2019 05:39:19 -0500 Received: from 8bytes.org ([81.169.241.247]:58754 "EHLO theia.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727468AbfAVKjS (ORCPT ); Tue, 22 Jan 2019 05:39:18 -0500 Received: by theia.8bytes.org (Postfix, from userid 1000) id 1411553D; Tue, 22 Jan 2019 11:39:16 +0100 (CET) Date: Tue, 22 Jan 2019 11:39:14 +0100 From: Joerg Roedel To: Eric Wong Cc: Joonas Lahtinen , David Woodhouse , Daniel Vetter , David Airlie , Jani Nikula , Rodrigo Vivi , iommu@lists.linux-foundation.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] iommu/intel: quirk to disable DMAR for QM57 igfx Message-ID: <20190122103914.msboylvkor5sb5lq@8bytes.org> References: <20181227114948.ev4b3jte3ubsc5us@dcvr> <154642214920.6261.102817444136744919@jlahtine-desk.ger.corp.intel.com> <20190104010626.e6yqdqkmdcqjepke@dcvr> <154659116310.4596.13613897418163029789@jlahtine-desk.ger.corp.intel.com> <20190118121705.a4usvhnskyblooja@dcvr> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190118121705.a4usvhnskyblooja@dcvr> User-Agent: NeoMutt/20170421 (1.8.2) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jan 18, 2019 at 12:17:05PM +0000, Eric Wong wrote: > @@ -5411,6 +5411,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_g4x_gfx); > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_g4x_gfx); > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_g4x_gfx); > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_g4x_gfx); > +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0044, quirk_iommu_g4x_gfx); > > static void quirk_iommu_rwbf(struct pci_dev *dev) > { > @@ -5457,7 +5458,6 @@ static void quirk_calpella_no_shadow_gtt(struct pci_dev *dev) > } > } > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0040, quirk_calpella_no_shadow_gtt); > -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0044, quirk_calpella_no_shadow_gtt); > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0062, quirk_calpella_no_shadow_gtt); > DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x006a, quirk_calpella_no_shadow_gtt); This seems to make sense to me. Joonas, any comments or objections? Regards, Joerg