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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: 98d6943d-0550-48b1-ca9f-08d6805a6f3a X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Jan 2019 11:11:54.0101 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0801MB2085 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: "james qian wang (Arm Technology China)" CHIP set bus_width according to the HW configuration, and CORE will use it as buffer alignment. v2: Rebase Signed-off-by: James Qian Wang (Arm Technology China) --- drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c | 1 + drivers/gpu/drm/arm/display/komeda/komeda_kms.c | 6 +++--- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu= /drm/arm/display/komeda/d71/d71_dev.c index f517ab0ceae9..a6ca3ff16fef 100644 --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c @@ -518,6 +518,7 @@ d71_identify(u32 __iomem *reg_base, struct komeda_chip_= info *chip) chip->arch_id =3D malidp_read32(reg_base, GLB_ARCH_ID); chip->core_id =3D malidp_read32(reg_base, GLB_CORE_ID); chip->core_info =3D malidp_read32(reg_base, GLB_CORE_INFO); + chip->bus_width =3D D71_BUS_WIDTH_16_BYTES; =20 return &d71_chip_funcs; } diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c b/drivers/gpu/= drm/arm/display/komeda/komeda_kms.c index 337e6fddead0..ed54beaee2f9 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c @@ -21,10 +21,10 @@ static int komeda_gem_cma_dumb_create(struct drm_file *= file, struct drm_device *dev, struct drm_mode_create_dumb *args) { - u32 alignment =3D 16; /* TODO get alignment from dev */ + struct komeda_dev *mdev =3D dev->dev_private; + u32 pitch =3D DIV_ROUND_UP(args->width * args->bpp, 8); =20 - args->pitch =3D ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), - alignment); + args->pitch =3D ALIGN(pitch, mdev->chip.bus_width); =20 return drm_gem_cma_dumb_create_internal(file, dev, args); } --=20 2.17.1