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Miller" , linux-crypto@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Bartlomiej Zolnierkiewicz , Marek Szyprowski Subject: [PATCH v1 3/3] crypto: s5p: add AES support for Exynos5433 Date: Tue, 22 Jan 2019 16:25:53 +0100 Message-Id: <20190122152553.1537-4-k.konieczny@partner.samsung.com> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190122152553.1537-1-k.konieczny@partner.samsung.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrGKsWRmVeSWpSXmKPExsWy7djP87pCZu4xBmfOs1hsnLGe1WLO+RYW i+5XMhZ9+/4zWpw/v4Hd4v69n0wWl3fNYbOYcX4fk8XaI3fZLf7/amZ24PLYsvImk8e2A6oe m1Z1snn8WziFxePguz1MHn1bVjF6fN4kF8AexWWTkpqTWZZapG+XwJWxt6mfqeCBXMX041YN jBcluhg5OSQETCR2XGtm62Lk4hASWMEoMXH7dXYI5wujxOfzC1ghnM+MEreaTrDBtHxqO8EE kVjOKHGypZkJruVH50OwKjYBc4lH288wgdgiAsoSk+9NZwYpYhZ4zSSx4fYrsISwgLPE0TUL mUFsFgFViQ2zVrOC2LxA8UdH1zJCrJOXmLa6C6yeU8BF4vypVVA1ghInZz5hAbGZgWqat84G WyAhsI5d4uz9b1DNLhJTH72CultY4tXxLewQtozE/53zmSDscondW5+xQzS3MErMnbwIKmEt cfj4RaBtHEAbNCXW79KHCDtKPJr4jAUkLCHAJ3HjrSDEDXwSk7aBPAkS5pXoaBOCqNaVmPf/ DCuELS3R9X8dlO0h8WHNY+YJjIqzkHwzC8k3sxD2LmBkXsUonlpanJueWmyUl1quV5yYW1ya l66XnJ+7iRGYmk7/O/5lB+OuP0mHGAU4GJV4eBMuuMYIsSaWFVfmHmKU4GBWEuF1vegWI8Sb klhZlVqUH19UmpNafIhRmoNFSZy3muFBtJBAemJJanZqakFqEUyWiYNTqoHRyHemdZzA65vz ehccrapjLNvn2b8w9n1Hofj5Jk6p+7x9/mV12Vk+QvnT/VkddszZ0fLO8NXHb18lA3Levmw/ rX+x8tnKk2WGNbnFEf94d8zZI25r+SiWfe+PEpY/EXyWC+UeK8mfKCquvdJwKzMtwu/Kk48L 53ZN/F6x7rqHwrQlW4oW2n1WYinOSDTUYi4qTgQAiyMrlUkDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrEIsWRmVeSWpSXmKPExsVy+t/xe7qCZu4xBs0zuS02zljPajHnfAuL RfcrGYu+ff8ZLc6f38Bucf/eTyaLy7vmsFnMOL+PyWLtkbvsFv9/NTM7cHlsWXmTyWPbAVWP Tas62Tz+LZzC4nHw3R4mj74tqxg9Pm+SC2CP0rMpyi8tSVXIyC8usVWKNrQw0jO0tNAzMrHU MzQ2j7UyMlXSt7NJSc3JLEst0rdL0MvY29TPVPBArmL6casGxosSXYycHBICJhKf2k4wgdhC AksZJVrOyULEpSUaT69mgrCFJf5c62LrYuQCqvnEKHH+9DF2kASbgLnEo+1nwIpEBJQlJt+b zgxiMwt8ZJL4s4obxBYWcJY4umYhWJxFQFViw6zVrCA2L1D80dG1jBAL5CWmre4Cm8Mp4CJx /tQqVoiDnCUeT5gDVS8ocXLmExaI+fISzVtnM09gFJiFJDULSWoBI9MqRpHU0uLc9NxiQ73i xNzi0rx0veT83E2MwPjZduzn5h2MlzYGH2IU4GBU4uHlOOcaI8SaWFZcmXuIUYKDWUmE1/Wi W4wQb0piZVVqUX58UWlOavEhRlOgJyYyS4km5wNjO68k3tDU0NzC0tDc2NzYzEJJnPe8QWWU kEB6YklqdmpqQWoRTB8TB6dUA6Pipxn7e0syLv7SDHLLqFTeJFn9h+vyw5LLHvc1pPdeFn79 Ivv3Uqnm8r1F33+JJoX3mjuknn5Sm57MMzfhfbxXK/MfryPKtzt0Z+vc5T7neMz6lvOlORMF nrl+PLFok+v8SYef6z30zaz9+L2aPfHmM9ZS7rp5RUZbc9fb2v+VzBO5oud2g1mJpTgj0VCL uag4EQAmdMqstQIAAA== X-CMS-MailID: 20190122152609eucas1p287b83592af600dc080374a197e6dd917 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-RootMTR: 20190122152609eucas1p287b83592af600dc080374a197e6dd917 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20190122152609eucas1p287b83592af600dc080374a197e6dd917 References: <20190122152553.1537-1-k.konieczny@partner.samsung.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add AES crypto HW acceleration for Exynos5433, with the help of SlimSSS IP. Signed-off-by: Kamil Konieczny --- drivers/crypto/s5p-sss.c | 50 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 46 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c index 0064be0e3941..1ae570ad4391 100644 --- a/drivers/crypto/s5p-sss.c +++ b/drivers/crypto/s5p-sss.c @@ -232,6 +232,7 @@ * struct samsung_aes_variant - platform specific SSS driver data * @aes_offset: AES register offset from SSS module's base. * @hash_offset: HASH register offset from SSS module's base. + * @clk_names: names of clocks needed to run SSS IP * * Specifies platform specific configuration of SSS module. * Note: A structure for driver specific platform data is used for future @@ -240,6 +241,7 @@ struct samsung_aes_variant { unsigned int aes_offset; unsigned int hash_offset; + char *clk_names[]; }; struct s5p_aes_reqctx { @@ -296,6 +298,7 @@ struct s5p_aes_ctx { struct s5p_aes_dev { struct device *dev; struct clk *clk; + struct clk *pclk; void __iomem *ioaddr; void __iomem *aes_ioaddr; int irq_fc; @@ -384,11 +387,19 @@ struct s5p_hash_ctx { static const struct samsung_aes_variant s5p_aes_data = { .aes_offset = 0x4000, .hash_offset = 0x6000, + .clk_names = { "secss", } }; static const struct samsung_aes_variant exynos_aes_data = { .aes_offset = 0x200, .hash_offset = 0x400, + .clk_names = { "secss", } +}; + +static const struct samsung_aes_variant exynos5433_slim_aes_data = { + .aes_offset = 0x400, + .hash_offset = 0x800, + .clk_names = { "pclk", "aclk", } }; static const struct of_device_id s5p_sss_dt_match[] = { @@ -400,6 +411,10 @@ static const struct of_device_id s5p_sss_dt_match[] = { .compatible = "samsung,exynos4210-secss", .data = &exynos_aes_data, }, + { + .compatible = "samsung,exynos5433-slim-sss", + .data = &exynos5433_slim_aes_data, + }, { }, }; MODULE_DEVICE_TABLE(of, s5p_sss_dt_match); @@ -2208,18 +2223,40 @@ static int s5p_aes_probe(struct platform_device *pdev) return PTR_ERR(pdata->ioaddr); } - pdata->clk = devm_clk_get(dev, "secss"); + pdata->clk = devm_clk_get(dev, variant->clk_names[0]); if (IS_ERR(pdata->clk)) { - dev_err(dev, "failed to find secss clock source\n"); + dev_err(dev, "failed to find secss clock %s\n", + variant->clk_names[0]); return -ENOENT; } err = clk_prepare_enable(pdata->clk); if (err < 0) { - dev_err(dev, "Enabling SSS clk failed, err %d\n", err); + dev_err(dev, "Enabling clock %s failed, err %d\n", + variant->clk_names[0], err); return err; } + if (variant->clk_names[1]) { + pdata->pclk = devm_clk_get(dev, variant->clk_names[1]); + if (IS_ERR(pdata->pclk)) { + dev_err(dev, "failed to find clock %s\n", + variant->clk_names[1]); + clk_disable_unprepare(pdata->clk); + return -ENOENT; + } + + err = clk_prepare_enable(pdata->pclk); + if (err < 0) { + dev_err(dev, "Enabling clock %s failed, err %d\n", + variant->clk_names[0], err); + clk_disable_unprepare(pdata->clk); + return err; + } + } else { + pdata->pclk = NULL; + } + spin_lock_init(&pdata->lock); spin_lock_init(&pdata->hash_lock); @@ -2295,8 +2332,10 @@ static int s5p_aes_probe(struct platform_device *pdev) tasklet_kill(&pdata->tasklet); err_irq: - clk_disable_unprepare(pdata->clk); + if (pdata->pclk) + clk_disable_unprepare(pdata->pclk); + clk_disable_unprepare(pdata->clk); s5p_dev = NULL; return err; @@ -2323,6 +2362,9 @@ static int s5p_aes_remove(struct platform_device *pdev) pdata->use_hash = false; } + if (pdata->pclk) + clk_disable_unprepare(pdata->pclk); + clk_disable_unprepare(pdata->clk); s5p_dev = NULL; -- 2.20.0