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[209.132.180.67]) by mx.google.com with ESMTP id l33si16581741pld.142.2019.01.22.07.33.31; Tue, 22 Jan 2019 07:33:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="ULo0J/+9"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729259AbfAVPbf (ORCPT + 99 others); Tue, 22 Jan 2019 10:31:35 -0500 Received: from mail-lf1-f65.google.com ([209.85.167.65]:37953 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729069AbfAVPbe (ORCPT ); Tue, 22 Jan 2019 10:31:34 -0500 Received: by mail-lf1-f65.google.com with SMTP id a8so18387829lfk.5 for ; Tue, 22 Jan 2019 07:31:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=jOUGIsOmORGCKF9e/Rej5bdFQhHGp65y62/iyDGaMw0=; b=ULo0J/+95/RFJrwpNuWhU/t4wKC6IbzdkhWhQL5xwrq37MATb03ijwLLIZf0XGgWnR 4dh5TDSG2+VdozXVROc8nR2JSTujGVlw1iqPYOhhU2d0T7TDGYkFnDTo2+TJEik0d5ti kAcyD1rSRh9OnitYwHPMiKMcGJ5wXc5nYdSCs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=jOUGIsOmORGCKF9e/Rej5bdFQhHGp65y62/iyDGaMw0=; b=OVedLDIIloLQXUtnm5rgchMqLw7rfIsG4VOTe33a59DHJ68Z26qNlsyOM571BxkVVT 027yEspT2kKcu6QzOwOgomftf/BzEdOTFt0dj8QSxBkZJUmMTq50M83BxZO91SSSm4m9 /WhQYxkHjm1vvu2VaIggM4UWd+XwdUxDGhBR8H+RWgc26lX+mqwpfuspH7mI8BW1l7x1 uBKaWjszkZFrlHyJKT6xKZHsJp+34pX0mWQG37hpZxFMmLFPddH1Ao+UIq84Wu13DJ/f 8OejFpxEGSh73kzQpY9hApzbRtytLeghfDbjM0rGkDFKxOsgTH/O9t5wljJBiQajZHYD 6NJw== X-Gm-Message-State: AJcUukfXmjP2sZ5uUMHtIY3VS8yML8KEFNhsguVLqKwZx5g9JUmlVnp5 xtAJeyzIcvmmWY+9xElahf/eHUpVrwSyY2dL59sCTQ== X-Received: by 2002:a19:db82:: with SMTP id t2mr22237666lfi.130.1548171092168; Tue, 22 Jan 2019 07:31:32 -0800 (PST) MIME-Version: 1.0 References: <20190119204252.18370-1-masneyb@onstation.org> In-Reply-To: <20190119204252.18370-1-masneyb@onstation.org> From: Linus Walleij Date: Tue, 22 Jan 2019 16:31:20 +0100 Message-ID: Subject: Re: [PATCH v6 00/15] qcom: spmi: add support for hierarchical IRQ chip To: Brian Masney Cc: Stephen Boyd , Bjorn Andersson , Andy Gross , Marc Zyngier , Shawn Guo , Doug Anderson , "open list:GPIO SUBSYSTEM" , Nicolas Dechesne , Niklas Cassel , David Brown , Rob Herring , Mark Rutland , "thierry.reding@gmail.com" , linux-arm-msm@vger.kernel.org, "linux-kernel@vger.kernel.org" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Jan 19, 2019 at 9:43 PM Brian Masney wrote: > This patch series adds hierarchical IRQ chip support to spmi-gpio so > that device tree consumers can request an IRQ directly from the GPIO > block rather than having to request an IRQ from the underlying PMIC. I have applied all these patches including the DTS patches to the GPIO tree and pushed for linux-next. If all works out well I will solidify the branch, pull it into the pin control tree as well and offer the branch to ARM SoC. Yours, Linus Walleij