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[209.132.180.67]) by mx.google.com with ESMTP id a8si17814384pgi.359.2019.01.22.22.55.23; Tue, 22 Jan 2019 22:55:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b="Yd/WkN0S"; dkim=pass header.i=@codeaurora.org header.s=default header.b=eSmWqtut; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726301AbfAWGxd (ORCPT + 99 others); Wed, 23 Jan 2019 01:53:33 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:56006 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725973AbfAWGxd (ORCPT ); Wed, 23 Jan 2019 01:53:33 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 5B6B960795; Wed, 23 Jan 2019 06:53:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1548226411; bh=SS7rYxPdMVWkbtJ1ROXKiUWK5xHmQiMDL3yy5M8+eC8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Yd/WkN0StZT2EIX3AKuUf5ra7ZPQ+y07KK0iZhk0Fe23ZF3Y/kyQJ0mSdf8pic3Kz lAOGIriYYqnROWD9nz3PBmZgv7SDOLneIEWRQvHZhAbudQ5B4KEoU0ms9hnvyGmvD5 NyDnUgGoFjqc09ict08U4kXn9VXdanpjErqpr0b8= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 741BF60225; Wed, 23 Jan 2019 06:53:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1548226410; bh=SS7rYxPdMVWkbtJ1ROXKiUWK5xHmQiMDL3yy5M8+eC8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=eSmWqtutgGZH17+DdJsTXG9MD4aEjj7R1CupNgGXXPlUPRIGumFR0Yp3WjZ93T3RO PxINgkmjCj0RyKGvHdzePoNJkuDJhLaTYg2M7+0R6fEpDhKIfDX80oqRG4S58idG0g bTv1A0dY/DL2ELkFJwdC2QbpzSR3qj6CV3t57Kjs= MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Wed, 23 Jan 2019 12:23:30 +0530 From: alokc@codeaurora.org To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, Greg Kroah-Hartman , Jiri Slaby , Mark Brown Cc: andy.gross@linaro.org, david.brown@linaro.org, georgi.djakov@linaro.org, dianders@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, linux-serial-owner@vger.kernel.org Subject: Re: [PATCH 5/6] tty: serial: qcom_geni_serial: Add interconnect support In-Reply-To: <1548138816-1149-6-git-send-email-alokc@codeaurora.org> References: <1548138816-1149-1-git-send-email-alokc@codeaurora.org> <1548138816-1149-6-git-send-email-alokc@codeaurora.org> Message-ID: X-Sender: alokc@codeaurora.org User-Agent: Roundcube Webmail/1.2.5 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org +Mark Brown On 2019-01-22 12:03, Alok Chauhan wrote: > Get the interconnect paths for Uart based Serial Engine device > and vote accordingly based on maximum supported Uart frequency. > > Signed-off-by: Alok Chauhan > --- > drivers/tty/serial/qcom_geni_serial.c | 27 ++++++++++++++++++++++++++- > 1 file changed, 26 insertions(+), 1 deletion(-) > > diff --git a/drivers/tty/serial/qcom_geni_serial.c > b/drivers/tty/serial/qcom_geni_serial.c > index a72d6d9..e2ea499 100644 > --- a/drivers/tty/serial/qcom_geni_serial.c > +++ b/drivers/tty/serial/qcom_geni_serial.c > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > > /* UART specific GENI registers */ > #define SE_UART_LOOPBACK_CFG 0x22c > @@ -1348,6 +1349,22 @@ static int qcom_geni_serial_probe(struct > platform_device *pdev) > return ret; > } > > + /* Set the bus quota to a reasonable value */ > + port->se.avg_bw = console ? Bps_to_icc(1000) : Bps_to_icc(2500); > + port->se.peak_bw = Bps_to_icc(76800000); > + ret = geni_interconnect_init(&port->se); > + if (ret) { > + dev_err(&pdev->dev, "interconnect_init failed %d\n", ret); > + return ret; > + } > + > + /* > + * Vote for interconnect path early. This has to move as part of > + * Runtime PM APIs when implemented for better control betwen > + * console and non-console usecases > + */ > + geni_icc_update_bw(&port->se, true); > + > res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > if (!res) > return -EINVAL; > @@ -1385,8 +1402,15 @@ static int __maybe_unused > qcom_geni_serial_sys_suspend(struct device *dev) > { > struct qcom_geni_serial_port *port = dev_get_drvdata(dev); > struct uart_port *uport = &port->uport; > + int ret; > + > + ret = uart_suspend_port(uport->private_data, uport); > + if (ret) > + return ret; > + > + geni_icc_update_bw(&port->se, false); > > - return uart_suspend_port(uport->private_data, uport); > + return 0; > } > > static int __maybe_unused qcom_geni_serial_sys_resume(struct device > *dev) > @@ -1394,6 +1418,7 @@ static int __maybe_unused > qcom_geni_serial_sys_resume(struct device *dev) > struct qcom_geni_serial_port *port = dev_get_drvdata(dev); > struct uart_port *uport = &port->uport; > > + geni_icc_update_bw(&port->se, true); > return uart_resume_port(uport->private_data, uport); > } -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,a Linux Foundation Collaborative Project