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Subject: RE: Intel vs AMD x86-64
Date: Tue, 2 Mar 2004 15:22:05 -0800
Message-ID: <7F740D512C7C1046AB53446D37200173EA2F06@scsmsx402.sc.intel.com>
Thread-Topic: Intel vs AMD x86-64
Thread-Index: AcP62b+YNygft82KT92E/c3K4V11cAAUNEzQAV5olwA=
From: "Nakajima, Jun" <jun.nakajima@intel.com>
To: "Kernel Mailing List" <linux-kernel@vger.kernel.org>
Sender: linux-kernel-owner@vger.kernel.org
Content-Length: 1585
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>-----Original Message-----
>From: Nakajima, Jun
>Sent: Tuesday, February 24, 2004 3:15 PM
>To: 'Pavel Machek'
>Cc: Linus Torvalds; Adrian Bunk; Herbert Poetzl; Mikael Pettersson;
Kernel
>Mailing List
>Subject: RE: Intel vs AMD x86-64
...
>Other than the standard IA-32 differences (eg. HT, SSE3, Intel Enhanced
>SpeedStep, etc.), there are few differences between the implementations
of
>IA-32e and AMD64. The software visible ones are:

Clarification to the BSF/BSR behavior when source is 0.

IA-32e inherits the existing behavior, which is "if the contents source
operand are 0, the contents of the destination operand is undefined."
One needs to check the ZF to detect such a condition. The defined
behavior for 64-bit mode is consistent with the one for 32-bit mode,
i.e. if the operand size is 64-bit, the whole destination is undefined
if the contents source operand are 0.

>BSF/BSR when source is 0 & operand size is 32:
>  In 64-bit mode, the processor sets ZF, and the upper 32 bits of
>  the destination are undefined. Should always check the ZF or do not
use
>  32-bit operand size.
>

So in this case, the lower 32 bits of the destination are undefined as
well, thus, the whole destination is undefined.

The advice is: Always check the ZF. You can use BSF/BSR with the 32-bit
operand size as long as you check the ZF. 

Jun

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