Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp694350imu; Wed, 23 Jan 2019 04:07:14 -0800 (PST) X-Google-Smtp-Source: ALg8bN6/+Dh53A6xQIKEjGxLHHyyYVBEzBQWUbLpMq1OwO/XL/t7hONw1SpPjtMrlgudgMskSfbl X-Received: by 2002:a17:902:24a2:: with SMTP id w31mr1938336pla.216.1548245234097; Wed, 23 Jan 2019 04:07:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1548245234; cv=none; d=google.com; s=arc-20160816; b=rkIAz0ftO9ng8gq4YEN/yJQQRSJqvbEt0ozR9FZQGcyhlsvgwmadaGMV7vVZsuSLW7 pVkZHfzA0imYHsuM9p3d9VJuCZM9WHFmvDsPdSEVOVOhW/tAinSl9Dr/UqamTgyIvIES 3YT9TKnjkhbq7vfp8SvMF+1j4vn7kGQNSo5xbi0E1UlB3poAws/G32kptsu0l3hTN3CA utQObimQIMT/+uwL01YYqL4J0FuUf6y3CcIk/LQGWbSKxlJagpprSW8CGSkzC95IGxyw Rte4KEHwDnLPZgBwyHvpGL0+YZKChkcyeQ6aZqA+2PEJanfRw/wFSnCNW81sRBXGdr4M dkNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from; bh=CBgxTgdqxj3AGuQu1PQ3n0eyv0N2sUn8P5+xdQ7q//w=; b=tJ2B3Yg+2Cz0xhKaitgQ4l+90mPBpgqfpPlSpod3rMDOByZqiig8k1o20IxQp6jPsu 5dRHedwaNdfWWZZ2WqSr9u9b3lYnT5O99CQxmB2K4NtR6wO8Jt3VTm7nyKMXRX84yYSn CugnN7sHGJX7iAHbVB01n8JTy5jIygIOUzNaUg4XKpxteKamWfFZbbSwpKVTlN+kMJ8a /9p8M2nd9z+Lmbdqmd+tZDRKXE0wX/lQkgw3ueseSaEDhCbPF6T4x1Z13zLhsX+yRl4K neFUZclQA3bMvpqBe/tbk/7LzeD7kdnqh6hJCYheQX26Ih26S36TscoNcGugC4G/hGjO rb0g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j132si17983459pfc.84.2019.01.23.04.06.57; Wed, 23 Jan 2019 04:07:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726853AbfAWMFg (ORCPT + 99 others); Wed, 23 Jan 2019 07:05:36 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:44153 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725991AbfAWMFf (ORCPT ); Wed, 23 Jan 2019 07:05:35 -0500 X-UUID: ad07804e1e5a4f7084ce36825f588b1a-20190123 X-UUID: ad07804e1e5a4f7084ce36825f588b1a-20190123 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 839534404; Wed, 23 Jan 2019 20:05:29 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 23 Jan 2019 20:05:28 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 23 Jan 2019 20:05:28 +0800 From: Chaotian Jing To: Ulf Hansson CC: Matthias Brugger , Chaotian Jing , Ryder Lee , Yong Mao , jjian zhou , Sean Wang , , , , , Subject: [PATCH] mmc: mediatek: fix incorrect register setting of hs400_cmd_int_delay Date: Wed, 23 Jan 2019 20:05:25 +0800 Message-ID: <1548245125-31664-1-git-send-email-chaotian.jing@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org to set cmd internal delay, need set PAD_TUNE register but not PAD_CMD_TUNE register. Signed-off-by: Chaotian Jing --- drivers/mmc/host/mtk-sd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 8afeaf8..833ef05 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -846,7 +846,7 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz) if (timing == MMC_TIMING_MMC_HS400 && host->dev_comp->hs400_tune) - sdr_set_field(host->base + PAD_CMD_TUNE, + sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRRDLY, host->hs400_cmd_int_delay); dev_dbg(host->dev, "sclk: %d, timing: %d\n", host->mmc->actual_clock, -- 1.8.1.1.dirty