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[209.132.180.67]) by mx.google.com with ESMTP id p3si21031357pgi.0.2019.01.23.04.58.49; Wed, 23 Jan 2019 04:59:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726203AbfAWM4p (ORCPT + 99 others); Wed, 23 Jan 2019 07:56:45 -0500 Received: from mx3.molgen.mpg.de ([141.14.17.11]:48273 "EHLO mx1.molgen.mpg.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726029AbfAWM4o (ORCPT ); Wed, 23 Jan 2019 07:56:44 -0500 Received: from keineahnung.molgen.mpg.de (keineahnung.molgen.mpg.de [141.14.17.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: pmenzel) by mx.molgen.mpg.de (Postfix) with ESMTPSA id 69D9520135342E; Wed, 23 Jan 2019 13:56:40 +0100 (CET) Subject: Re: tsc: Fast TSC calibration failed with sever AMD Ryzen processor (2200G, 2400G, Ryzen 7 1700) To: Thomas Lendacky Cc: Thomas Gleixner , "x86@kernel.org" , LKML References: <9f444c64-c221-e729-7eb5-fc4f093c16d3@molgen.mpg.de> <5656446a-eaef-aa94-8766-49fec24257c6@molgen.mpg.de> <0bacd3f0-12fd-c1d9-8bed-320ac87d4505@molgen.mpg.de> From: Paul Menzel Message-ID: Date: Wed, 23 Jan 2019 13:56:40 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: Content-Type: multipart/signed; protocol="application/pkcs7-signature"; micalg=sha-256; boundary="------------ms060902020100010306030805" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is a cryptographically signed message in MIME format. --------------ms060902020100010306030805 Content-Type: multipart/mixed; boundary="------------452C442898FB1C784A346B5C" Content-Language: en-US This is a multi-part message in MIME format. --------------452C442898FB1C784A346B5C Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Dear Tom, On 01/22/19 21:24, Lendacky, Thomas wrote: > On 1/22/19 10:53 AM, Paul Menzel wrote: >> [Adding Tom to CC] >> On 01/14/19 11:09, Paul Menzel wrote: >> >>> On 01/11/19 21:43, Thomas Gleixner wrote: >>> >>>> On Mon, 7 Jan 2019, Paul Menzel wrote: >>>>> On 01/07/19 16:24, Thomas Gleixner wrote: >>>>>>> Linux 4.19.13 from Debian Sid/unstable logs the message below on = the board MSI >>>>>>> MS-7A37/B350M MORTAR with the processor AMD Ryzen 3 2200G. >>>>>>> >>>>>>> As a result, the early time stamps do not seem to be working. >>>>>> >>>>>>>> [ 0.000000] DMI: Micro-Star International Co., Ltd. MS-7A37/B= 350M MORTAR (MS-7A37), BIOS 1.I0 11/06/2018 >>>>>>>> [ 0.000000] tsc: Fast TSC calibration failed >>>>>> >>>>>> And the further boot log says: >>>>>> >>>>>> [ 0.036000] tsc: Unable to calibrate against PIT >>>>>> [ 0.036000] tsc: using HPET reference calibration >>>>>> [ 0.036000] tsc: Detected 3500.117 MHz processor >>>>>> >>>>>> So the quick calibration in early boot fails because the PIT seems= not to >>>>>> do what the kernel expects. Nothing we can cure :( >>>>> >>>>> I see. Can AMD confirm that this is the expected behavior? If yes, = should >>>>> the fast TSC calibration be skipped on these devices? > It's not expected behavior. All of the systems that I have access to do= > not exhibit this issue. Having said that, I have a limited number of > systems available to me. But as a data point, what Ryzen systems did you test with? Just to know, = if there are configurations where the same processor behaves inconsistently.= Can you request one of the failing systems mentioned below to reproduce t= he problem? > I don't have much experience in this area, but if it is something that > consistently occurs, you might try to see if you can better identify wh= y > it fails. The message is issued in pit_hpet_ptimer_calibrate_cpu() in f= ile > arch/x86/kernel/tsc.c. With the attached patch applied, I get: [ 0.000000] tsc: quick_pit_calibrate: break in if !pit_expect_msb,= i =3D 42 [ 0.000000] tsc: Fast TSC calibration failed, i =3D 42 [ 0.000000] tsc: Using PIT calibration value The functions `pit_verify_msb()` and `pit_expect_msb()` are: ``` static inline int pit_verify_msb(unsigned char val) { /* Ignore LSB */ inb(0x42); return inb(0x42) =3D=3D val; } static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned l= ong *deltap) { int count; u64 tsc =3D 0, prev_tsc =3D 0; for (count =3D 0; count < 50000; count++) { if (!pit_verify_msb(val)) break; prev_tsc =3D tsc; tsc =3D get_cycles(); } *deltap =3D get_cycles() - prev_tsc; *tscp =3D tsc; /* * We require _some_ success, but the quality control * will be based on the error terms on the TSC values. */ return count > 5; } ``` So count is smaller than or equal to 5, and `pit_verify_msb(val)` failed = early, right? >>>> It should work and we really don't want to add cpu family/model base= d >>>> decisions whether we invoke something or not. Those tables are stale= before >>>> they hit mainline. >>> >>> Understood. If it=E2=80=99s supposed to work, any hints on how to deb= ug this? >>> >>> Does some Linux kernel developers have an AMD Ryzen system, and can r= eproduce >>> the issue? >>> >>> It seems to fail with an AMD Ryzen 2400G too [1]. >> >> We now have an HP EliteDesk 705 G4 MT with that processsor, showing th= e same >> problem. >> >> ``` >> [ 0.000000] Linux version 4.20.0.mx64.238 (root@elcattivo.molgen.mp= g.de) (gcc version 7.3.0 (GCC)) #1 SMP Mon Dec 24 14:50:00 CET 2018 >> [=E2=80=A6] >> [ 0.000000] NX (Execute Disable) protection: active >> [ 0.000000] SMBIOS 3.1 present. >> [ 0.000000] DMI: HP HP EliteDesk 705 G4 MT/83E7, BIOS Q06 Ver. 02.0= 4.01 09/14/2018 >> [ 0.000000] tsc: Fast TSC calibration failed >> [ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable =3D=3D>= reserved >> [=E2=80=A6] >> [ 0.017860] smpboot: CPU0: AMD Ryzen 5 PRO 2400G with Radeon Vega G= raphics (family: 0x17, model: 0x11, stepping: 0x0) >> [=E2=80=A6] >> ``` >> >>> It also fails on an AMD Ryzen 7 1700 [2]. >>> >>> ``` >>> [ 0.000000] Linux version 4.15.0-kali3-amd64 (devel@kali.org) (gcc ve= rsion 7.3.0 (Debian 7.3.0-16)) #1 SMP Debian 4.15.17-1kali1 (2018-04-25) >>> [=E2=80=A6] >>> [ 0.008000] ..TIMER: vector=3D0x30 apic1=3D0 pin1=3D2 apic2=3D-1 pin2= =3D-1 >>> [ 0.028000] tsc: Fast TSC calibration failed >>> [ 0.032000] tsc: PIT calibration matches HPET. 1 loops >>> [ 0.032000] tsc: Detected 2994.246 MHz processor >>> [=E2=80=A6] >>> [ 0.044000] smpboot: CPU0: AMD Ryzen 7 1700 Eight-Core Processor (fam= ily: 0x17, model: 0x1, stepping: 0x1) >>> ``` >>> >>> It *works* here on one system with AMD Ryzen 5 PRO 1500 and Linux 4.1= 4.87. >>> >>> ``` >>> [ 0.000000] Linux version 4.14.87.mx64.236 (root@likearollingstone= =2Emolgen.mpg.de) (gcc version 7.3.0 (GCC)) #1 SMP Mon Dec 10 09:48:57 CE= T 2018 >>> [=E2=80=A6] >>> [ 0.000000] tsc: Fast TSC calibration using PIT >>> [=E2=80=A6] >>> [ 0.035000] smpboot: CPU0: AMD Ryzen 5 PRO 1500 Quad-Core Processo= r (family: 0x17, model: 0x1, stepping: 0x1) >>> ``` >> >> How to continue from here? Is documentation for that available from AM= D? >> I didn=E2=80=99t find a BKDG (Bios Kernel Developer Guide) at [3]. Kind regards, Paul >>> [1]: https://bbs.archlinux.org/viewtopic.php?pid=3D1781282#p1781282 >>> [2]: https://forums.kali.org/showthread.php?40444-error-loading-amdgp= u-drivers-AMD-RX580-driver[3]: https://developer.amd.com/resources/develo= per-guides-manuals/ --------------452C442898FB1C784A346B5C Content-Type: text/x-patch; name="0001-x86-kernel-tsc-Debug-early-TSC-calibration.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="0001-x86-kernel-tsc-Debug-early-TSC-calibration.patch" =46rom af43aa1191dd7abcfece56b712966bb19df94653 Mon Sep 17 00:00:00 2001 From: Paul Menzel Date: Wed, 23 Jan 2019 00:24:37 +0100 Subject: [PATCH] x86/kernel/tsc: Debug early TSC calibration Signed-off-by: Paul Menzel --- arch/x86/kernel/tsc.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index e9f777bfed40..28d0b4b29668 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -549,8 +549,10 @@ static unsigned long quick_pit_calibrate(void) =20 if (pit_expect_msb(0xff, &tsc, &d1)) { for (i =3D 1; i <=3D MAX_QUICK_PIT_ITERATIONS; i++) { - if (!pit_expect_msb(0xff-i, &delta, &d2)) + if (!pit_expect_msb(0xff-i, &delta, &d2)) { + pr_err("%s: break in if !pit_expect_msb, i =3D %d\n", __func__, i); break; + } =20 delta -=3D tsc; =20 @@ -575,12 +577,14 @@ static unsigned long quick_pit_calibrate(void) * This also guarantees serialization of the * last cycle read ('d2') in pit_expect_msb. */ - if (!pit_verify_msb(0xfe - i)) + if (!pit_verify_msb(0xfe - i)) { + pr_err("%s: break in if !pit_verify_msb\n", __func__); break; + } goto success; } } - pr_info("Fast TSC calibration failed\n"); + pr_info("Fast TSC calibration failed, i =3D %d\n", i); return 0; =20 success: --=20 2.20.1 --------------452C442898FB1C784A346B5C-- --------------ms060902020100010306030805 Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Transfer-Encoding: base64 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