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[209.132.180.67]) by mx.google.com with ESMTP id 20si3636737pft.177.2019.01.23.07.04.29; Wed, 23 Jan 2019 07:04:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726166AbfAWPCq convert rfc822-to-8bit (ORCPT + 99 others); Wed, 23 Jan 2019 10:02:46 -0500 Received: from mga04.intel.com ([192.55.52.120]:39552 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725862AbfAWPCq (ORCPT ); Wed, 23 Jan 2019 10:02:46 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Jan 2019 07:02:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,511,1539673200"; d="scan'208";a="109143584" Received: from jlahtine-desk.ger.corp.intel.com (HELO localhost) ([10.251.86.62]) by orsmga007.jf.intel.com with ESMTP; 23 Jan 2019 07:02:39 -0800 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT To: Joerg Roedel From: Joonas Lahtinen Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo In-Reply-To: <20190122165135.6rkdsxqepvmaoatn@8bytes.org> Cc: Daniel Vetter , Eric Wong , David Woodhouse , David Airlie , Jani Nikula , Rodrigo Vivi , "list@263.net:IOMMU DRIVERS , Joerg Roedel , " , intel-gfx , dri-devel , Linux Kernel Mailing List References: <20181227114948.ev4b3jte3ubsc5us@dcvr> <154642214920.6261.102817444136744919@jlahtine-desk.ger.corp.intel.com> <20190104010626.e6yqdqkmdcqjepke@dcvr> <154659116310.4596.13613897418163029789@jlahtine-desk.ger.corp.intel.com> <20190118121705.a4usvhnskyblooja@dcvr> <20190122103914.msboylvkor5sb5lq@8bytes.org> <20190122110109.x3zoynemdl3ysbsn@8bytes.org> <154816850584.8871.13562920355478587539@jlahtine-desk.ger.corp.intel.com> <20190122165135.6rkdsxqepvmaoatn@8bytes.org> Message-ID: <154825575844.19121.1110495981060533179@jlahtine-desk.ger.corp.intel.com> User-Agent: alot/0.6 Subject: Re: [PATCH] iommu/intel: quirk to disable DMAR for QM57 igfx Date: Wed, 23 Jan 2019 17:02:38 +0200 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Joerg Roedel (2019-01-22 18:51:35) > On Tue, Jan 22, 2019 at 04:48:26PM +0200, Joonas Lahtinen wrote: > > According to our IOMMU folks there exists some desire to be able to assign > > the iGFX device aka have intel_iommu=on instead of intel_iommu=igfx_off > > due to how the devices might be grouped in IOMMU groups. Even when you > > would not be using the iGFX device. > > You can force the igfx device into a SI domain, or does that also > trigger the iommu issues on the chipset? To be honest, we've had a mixture different issues on different SKUs that have not been hit in the past when intel_iommu was just disabled by default. I know that in one group of the problems, the issue has been debugged into the GPU having its own set of virtualization mapping translation hardware with caching and it fails to track changes to the mapping. So if a identity mapping was established and never changed, I'd assume that to fix at least that class of problems. Would just passing intel_iommu=on already cause a non-identity mapping to possibly be used for the integrated GPU? If it did, then it would explain quite few of the issues. We have many reports where just having intel_iommu=on (and using the system normally, without any virtualization stuff going on) will cause unexplained GPU hangs. For those users, simply switching to intel_iommu=igfx_off solves the problems, and the debug often ends there. Regards, Joonas > In any case, if iommu=on breaks these systems I want to make them work > again with opt-out, even at the cost of breaking assignability. > > Regards, > > Joerg