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[209.132.180.67]) by mx.google.com with ESMTP id 63si22916950pfv.38.2019.01.24.06.02.47; Thu, 24 Jan 2019 06:03:30 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=XfrK273v; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728306AbfAXOBx (ORCPT + 99 others); Thu, 24 Jan 2019 09:01:53 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:50379 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727799AbfAXOBw (ORCPT ); Thu, 24 Jan 2019 09:01:52 -0500 Received: by mail-wm1-f68.google.com with SMTP id n190so3262755wmd.0 for ; Thu, 24 Jan 2019 06:01:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=Zly3uJj3nfd6LGkHaexN+XCtlqBu6G31R9osIiXcn5Y=; b=XfrK273vOJhFqVOf+1SgApy2Ctx3xStj+i54ORpCNbe8b7lmTkF4tOKmiZ6lis2+hC LsTHR17+hOdKX0h1SuhMnDFRP9jkCIzMZoNFEf4sreZzv+0czlzetDK6E0F7Cgho/7FG d42/ZluW2dpJ6LyFMJjupX6yO8G3OWftd4S17aIPb1zUH49AUqlHJD8gdPwwSDnxRT+t B5csQ74gc2Yp8mzwCzyF74+uiPxyDAQcc0PFDznl8O2KAodX0FadGK3CsZLDa3UuUKyD J40QmN9Xi/eudPMhRf/EX2ZJRI4j5gFambT3MdTajwP/5QsRQKHXcwnC+rCjzuki15PU BD0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=Zly3uJj3nfd6LGkHaexN+XCtlqBu6G31R9osIiXcn5Y=; b=lQ4ojPfwMAEgmofU3baxjXWQ0jNij4LxOVh1fQSbVAsd/GHGKjenWvv8we7fQzAQDS Z0EzXDzhMICGd5A3dp0RCztM/IkOA9B+YFnRVfla/AnTCOJfrUSWnXKx9oPwUEaZ1Ixa 8pgf2wZnBm/eqaAQT90zxiB5CmbR2uOJe1Xqxw4RKa9Jgd8BdBR2uJCK1obhtMSgKBRi IRQaExUMMJxsfuNoZwEh31K3cbA3jFr+pJHajcYy56LPahtFCpYvLahF6D/ZA782IlHb uzJfVrnvscnjZURJmeUyjPr+Rlea0BOFhd7/3xLTF1HEWBIpFdZRr2DS96Ltu8mqlbs1 63+A== X-Gm-Message-State: AJcUukdU4zUr0AkIP1w96RZsvCoJ42QGNScAJaGL3w26339MZxZKueEv E/W43kBLPgKVvi71CqpQVhAngqytZJNgV8daI2Y= X-Received: by 2002:a1c:c87:: with SMTP id 129mr2653509wmm.116.1548338509915; Thu, 24 Jan 2019 06:01:49 -0800 (PST) MIME-Version: 1.0 References: <20190124120658.30288-1-ard.biesheuvel@linaro.org> <3cca35a9-c71c-a100-b29d-31ba0d1d10b1@amd.com> In-Reply-To: From: Alex Deucher Date: Thu, 24 Jan 2019 09:01:37 -0500 Message-ID: Subject: Re: [PATCH] drm: enable uncached DMA optimization for ARM and arm64 To: Ard Biesheuvel Cc: "Koenig, Christian" , "Zhou, David(ChunMing)" , Maxime Ripard , Benjamin Herrenschmidt , Carsten Haitzler , David Airlie , Maarten Lankhorst , dri-devel , "Daenzer, Michel" , "linux-kernel@vger.kernel.org" , Will Deacon , Christoph Hellwig , "Zhang, Jerry" , "Huang, Ray" , amd-gfx list , Daniel Vetter , Michael Ellerman , "Deucher, Alexander" , Sean Paul , "linux-arm-kernel@lists.infradead.org" , Robin Murphy Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jan 24, 2019 at 9:00 AM Ard Biesheuvel wrote: > > On Thu, 24 Jan 2019 at 13:31, Koenig, Christian > wrote: > > > > Am 24.01.19 um 13:06 schrieb Ard Biesheuvel: > > > The DRM driver stack is designed to work with cache coherent devices > > > only, but permits an optimization to be enabled in some cases, where > > > for some buffers, both the CPU and the GPU use uncached mappings, > > > removing the need for DMA snooping and allocation in the CPU caches. > > > > > > The use of uncached GPU mappings relies on the correct implementation > > > of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU > > > will use cached mappings nonetheless. On x86 platforms, this does not > > > seem to matter, as uncached CPU mappings will snoop the caches in any > > > case. However, on ARM and arm64, enabling this optimization on a > > > platform where NoSnoop is ignored results in loss of coherency, which > > > breaks correct operation of the device. Since we have no way of > > > detecting whether NoSnoop works or not, just disable this > > > optimization entirely for ARM and arm64. > > > > > > Cc: Christian Koenig > > > Cc: Alex Deucher > > > Cc: David Zhou > > > Cc: Huang Rui > > > Cc: Junwei Zhang > > > Cc: Michel Daenzer > > > Cc: David Airlie > > > Cc: Daniel Vetter > > > Cc: Maarten Lankhorst > > > Cc: Maxime Ripard > > > Cc: Sean Paul > > > Cc: Michael Ellerman > > > Cc: Benjamin Herrenschmidt > > > Cc: Will Deacon > > > Cc: Christoph Hellwig > > > Cc: Robin Murphy > > > Cc: amd-gfx list > > > Cc: dri-devel > > > Reported-by: Carsten Haitzler > > > Signed-off-by: Ard Biesheuvel > > > > The subject line should probably read "disable uncached...". > > > > Ugh, of course ... > > > With that fixed the patch is Reviewed-by: Christian K=C3=B6nig > > . > > Same: Reviewed-by: Alex Deucher > > Thanks. > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx