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[209.132.180.67]) by mx.google.com with ESMTP id q7si22274406pll.404.2019.01.24.13.42.07; Thu, 24 Jan 2019 13:42:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@crapouillou.net header.s=mail header.b=oChVkpbe; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727955AbfAXVmB (ORCPT + 99 others); Thu, 24 Jan 2019 16:42:01 -0500 Received: from outils.crapouillou.net ([89.234.176.41]:55058 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726347AbfAXVmB (ORCPT ); Thu, 24 Jan 2019 16:42:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1548366117; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CvRzEbTgAQ9trPEVGxl/lVEhzA9RVr/wI5nkhToSdgg=; b=oChVkpbeL3xIHMcvcFvke5Gn2a3wSxpeTab0ZXH0owYo46vXNHQYHSpDX9YndxIpSQSt6i /eU15Wt7jHeKzldO+xpCQfHnm9FN/2P16qqpq9nPweT/ILXKfKMFdsuJFfG9xrPFPaxXaB rIwv/bG+wLDX7Q1U3j0xecUFwp3P6OM= Date: Thu, 24 Jan 2019 18:41:35 -0300 From: Paul Cercueil Subject: Re: [PATCH v8 00/26] Ingenic TCU patchset v8 To: Mathieu Malaterre Cc: Thierry Reding , Rob Herring , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Ralf Baechle , Paul Burton , James Hogan , Jonathan Corbet , Ezequiel Garcia , PrasannaKumar Muralidharan , linux-pwm@vger.kernel.org, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , LKML , linux-watchdog@vger.kernel.org, linux-mips@vger.kernel.org, linux-doc@vger.kernel.org, linux-clk@vger.kernel.org, od@zcrc.me Message-Id: <1548366095.3881.1@crapouillou.net> In-Reply-To: References: <20181212220922.18759-1-paul@crapouillou.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1; format=flowed Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Mathieu, Le jeu. 24 janv. 2019 =E0 18:26, Mathieu Malaterre a=20 =E9crit : > Paul, >=20 > On Wed, Dec 12, 2018 at 11:09 PM Paul Cercueil =20 > wrote: >>=20 >> Hi, >>=20 >> Here's the version 8 and hopefully final version of my patchset,=20 >> which >> adds support for the Timer/Counter Unit found in JZ47xx SoCs from >> Ingenic. >=20 > I can no longer boot my MIPS Creator CI20 with this series (merged > opendingux/for-upstream-timer-v8). >=20 > Using screen+ttyUSB, I can see messages stopping at: >=20 > ... > [ OK ] Started Cgroup management daemon. > Starting Regular background program processing daemon... > [ OK ] Started Regular background program processing daemon. > Starting System Logging Service... > Starting Provide limited super user privileges to specific=20 > users... > Starting Restore /etc/resolv.conf if the system cras...s=20 > shut down.... > Starting WPA supplicant... > Starting D-Bus System Message Bus... > [ OK ] Started D-Bus System Message Bus. >=20 > Nothing really stands out in the error messages. Could you suggest > things to try out to get into a bootable state ? I'm debugging it right now on jz4740, it seems to happen when the=20 clocksource from the ingenic-timer driver is used. Is it your case? It should not=20 happen if you have CONFIG_INGENIC_OST set. >> The big change is that the timer driver has been simplified. The=20 >> code to >> dynamically update the system timer or clocksource to a new channel=20 >> has >> been removed. Now, the system timer and clocksource are provided as >> children nodes in the devicetree, and the TCU channel to use for=20 >> these >> is deduced from their respective memory resource. The PWM driver=20 >> will >> also deduce from its memory resources whether a given PWM channel=20 >> can be >> used, or is reserved for the system timers. >>=20 >> Kind regards, >> - Paul Cercueil >>=20 =