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[209.132.180.67]) by mx.google.com with ESMTP id p18si31189581plo.223.2019.01.27.23.03.50; Sun, 27 Jan 2019 23:04:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726828AbfA1HDF (ORCPT + 99 others); Mon, 28 Jan 2019 02:03:05 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:40036 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726630AbfA1HDE (ORCPT ); Mon, 28 Jan 2019 02:03:04 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B0A3FA78 for ; Sun, 27 Jan 2019 23:03:04 -0800 (PST) Received: from mail-it1-f174.google.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 977963F5AF for ; Sun, 27 Jan 2019 23:03:04 -0800 (PST) Received: by mail-it1-f174.google.com with SMTP id i145so19038644ita.4 for ; Sun, 27 Jan 2019 23:03:04 -0800 (PST) X-Gm-Message-State: AJcUukeeACp8MD2TWUWXcG8UvjSdK/Tztr8T2JBCf0tYX6h0ERW5FfKq PywpEQbQWOOcJKSYHExuhz1zKwrgyypbtuA5OFg= X-Received: by 2002:a24:7c58:: with SMTP id a85mr9778119itd.9.1548658983837; Sun, 27 Jan 2019 23:03:03 -0800 (PST) MIME-Version: 1.0 References: <1545119810-12182-1-git-send-email-amit.kachhap@arm.com> <1545119810-12182-5-git-send-email-amit.kachhap@arm.com> <33542a00-23f4-b159-91f5-f05d3afa5b9f@arm.com> In-Reply-To: <33542a00-23f4-b159-91f5-f05d3afa5b9f@arm.com> From: Amit Daniel Kachhap Date: Mon, 28 Jan 2019 12:32:52 +0530 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 4/6] arm64/kvm: enable pointer authentication cpufeature conditionally To: James Morse Cc: LAK , Marc Zyngier , Catalin Marinas , Will Deacon , Kristina Martsenko , kvmarm@lists.cs.columbia.edu, Ramana Radhakrishnan , Dave Martin , linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi James, On Fri, Jan 4, 2019 at 11:32 PM James Morse wrote: > > Hi Amit, > > On 18/12/2018 07:56, Amit Daniel Kachhap wrote: > > According to userspace settings, pointer authentication cpufeature > > is enabled/disabled from guests. > > This reads like the guest is changing something in the host. Isn't this hiding > the id-register values from the guest? I dropped this patch altogether in V5 series and now only key registers are masked if userspace disables it. Thanks, Amit Daniel > > > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > > index 6af6c7d..ce6144a 100644 > > --- a/arch/arm64/kvm/sys_regs.c > > +++ b/arch/arm64/kvm/sys_regs.c > > @@ -1066,6 +1066,15 @@ static u64 read_id_reg(struct sys_reg_desc const *r, bool raz) > > kvm_debug("SVE unsupported for guests, suppressing\n"); > > > > val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT); > > + } else if (id == SYS_ID_AA64ISAR1_EL1) { > > + const u64 ptrauth_mask = (0xfUL << ID_AA64ISAR1_APA_SHIFT) | > > + (0xfUL << ID_AA64ISAR1_API_SHIFT) | > > + (0xfUL << ID_AA64ISAR1_GPA_SHIFT) | > > + (0xfUL << ID_AA64ISAR1_GPI_SHIFT); > > + if (!kvm_arm_vcpu_ptrauth_allowed(vcpu)) { > > + kvm_debug("ptrauth unsupported for guests, suppressing\n"); > > + val &= ~ptrauth_mask; > > + } > > I think this hunk should have been in the previous patch as otherwise its a > bisection oddity. > > Could you merge this hunk with the previous patch, and move the mechanical bits > that pass vcpu around to a prior preparatory patch. > > (I'm still unsure if we need to hide this as a user-controlled policy) > > > Thanks, > > James