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From:   Anton Kuchin <antonkuchin@yandex-team.ru>
To:     kvm@vger.kernel.org
Cc:     Paolo Bonzini <pbonzini@redhat.com>,
        =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= <rkrcmar@redhat.com>,
        Borislav Petkov <bp@alien8.de>, x86@kernel.org,
        "H. Peter Anvin" <hpa@zytor.com>, linux-kernel@vger.kernel.org,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>,
        Evgeny Yakovlev <wrfsh@yandex-team.ru>,
        Anton Kuchin <antonkuchin@yandex-team.ru>
Subject: [PATCH] KVM: Ignore LBR MSRs with no effect
Date:   Mon, 28 Jan 2019 20:43:22 +0300
Message-Id: <20190128174322.8529-1-antonkuchin@yandex-team.ru>
MIME-Version: 1.0
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Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Win10 attempts to save these registers during KiSaveDebugRegisterState
if LBR or BTF bits are set in MSR_IA32_DEBUGCTLMSR. It uses DR7 GE and LE
flags for per-thread switching of these these features so zero value that
is returned for MSR_IA32_DEBUGCTLMSR has no effect.

These registers are used for debugging and shouldn't cause #GP and
guest crash so just return zeroes just like we do for common x86 LBR
MSRs (DEBUGCTLMSR, LAST[BRANCH|INT][TO|FROM]IP).

Signed-off-by: Anton Kuchin <antonkuchin@yandex-team.ru>
---
 arch/x86/kvm/vmx/vmx.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index f6915f10e584..8bc56cf027ed 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1769,6 +1769,13 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 		else
 			msr_info->data = vmx->pt_desc.guest.addr_a[index / 2];
 		break;
+	case MSR_LBR_TOS:
+	case MSR_LBR_NHM_FROM ... MSR_LBR_NHM_FROM + 31:
+	case MSR_LBR_NHM_TO ... MSR_LBR_NHM_TO + 31:
+	case MSR_LBR_CORE_FROM ... MSR_LBR_CORE_FROM + 7:
+	case MSR_LBR_CORE_TO ... MSR_LBR_CORE_TO + 7:
+		msr_info->data = 0;
+		break;
 	case MSR_TSC_AUX:
 		if (!msr_info->host_initiated &&
 		    !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP))
-- 
2.19.1