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[209.132.180.67]) by mx.google.com with ESMTP id d17si2784603pfm.40.2019.01.28.23.35.07; Mon, 28 Jan 2019 23:35:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727500AbfA2HdK (ORCPT + 99 others); Tue, 29 Jan 2019 02:33:10 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:32651 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725773AbfA2HcU (ORCPT ); Tue, 29 Jan 2019 02:32:20 -0500 X-UUID: e471fca04a5849b19174ac59ed25e6ba-20190129 X-UUID: e471fca04a5849b19174ac59ed25e6ba-20190129 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 33297587; Tue, 29 Jan 2019 15:32:13 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 29 Jan 2019 15:32:12 +0800 Received: from mtkslt302.mediatek.inc (10.21.14.115) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 29 Jan 2019 15:32:12 +0800 From: Bibby Hsieh To: Jassi Brar , Matthias Brugger , Rob Herring , CK HU CC: Daniel Kurtz , Sascha Hauer , , , , , , Sascha Hauer , Philipp Zabel , Nicolas Boichat , Bibby Hsieh , YT Shen , Daoyuan Huang , Jiaguang Zhang , Dennis-YC Hsieh , Houlong Wei , , , Frederic Chen Subject: [PATCH 10/10] soc: mediatek: add polling function Date: Tue, 29 Jan 2019 15:32:07 +0800 Message-ID: <1548747128-60136-11-git-send-email-bibby.hsieh@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1548747128-60136-1-git-send-email-bibby.hsieh@mediatek.com> References: <1548747128-60136-1-git-send-email-bibby.hsieh@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org add polling function in cmdq helper functions Signed-off-by: Bibby Hsieh --- drivers/soc/mediatek/mtk-cmdq-helper.c | 24 ++++++++++++++++++++++++ include/linux/mailbox/mtk-cmdq-mailbox.h | 1 + include/linux/soc/mediatek/mtk-cmdq.h | 15 +++++++++++++++ 3 files changed, 40 insertions(+) diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index 34ae712..bc504ff 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -298,6 +298,30 @@ int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event) } EXPORT_SYMBOL(cmdq_pkt_clear_event); +int cmdq_pkt_poll(struct cmdq_pkt *pkt, struct cmdq_base *clt_base, + dma_addr_t addr, u32 value, u32 mask) +{ + int err; + const u32 base = (addr >> 32) ? 0 : addr & 0xFFFF0000; + u8 subsys = cmdq_subsys_base_to_id(clt_base, base); + s16 offset = addr & 0x0000FFFF; + + if (mask != 0xffffffff) { + err = cmdq_pkt_append_command(pkt, CMDQ_GET_ARG_C(~mask), + CMDQ_GET_ARG_B(~mask), + 0, 0, 0, 0, 0, CMDQ_CODE_MASK); + + if (err != 0) + return err; + } + offset = offset | 0x1; + + return cmdq_pkt_append_command(pkt, CMDQ_GET_ARG_C(value), + CMDQ_GET_ARG_B(value), + offset, subsys, 0, 0, 0, CMDQ_CODE_POLL); +} +EXPORT_SYMBOL(cmdq_pkt_poll); + static int cmdq_pkt_finalize(struct cmdq_pkt *pkt) { int err; diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h index f21801d..1dfd5ed 100644 --- a/include/linux/mailbox/mtk-cmdq-mailbox.h +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h @@ -46,6 +46,7 @@ enum cmdq_code { CMDQ_CODE_MASK = 0x02, CMDQ_CODE_WRITE = 0x04, + CMDQ_CODE_POLL = 0x08, CMDQ_CODE_JUMP = 0x10, CMDQ_CODE_WFE = 0x20, CMDQ_CODE_EOC = 0x40, diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 230bc2b..f6227bf 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -110,6 +110,21 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, struct cmdq_base *clt_base, int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event); /** + * cmdq_pkt_poll() - Append polling command to the CMDQ packet, ask GCE to + * execute an instruction that wait for a specified hardware + * register to check for the value. All GCE hardware + * threads will be blocked by this instruction. + * @pkt: the CMDQ packet + * @cmdq_base: the CMDQ sub system code and base address + * @addr: register address + * @value: the specified target register value + * @mask: the specified target register mask + * + * Return: 0 for success; else the error code is returned + */ +int cmdq_pkt_poll(struct cmdq_pkt *pkt, struct cmdq_base *clt_base, + dma_addr_t addr, u32 value, u32 mask); +/** * cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ * packet and call back at the end of done packet * @pkt: the CMDQ packet -- 1.9.1