Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp4672649imu; Tue, 29 Jan 2019 05:42:44 -0800 (PST) X-Google-Smtp-Source: ALg8bN7qHCeSyt6/ww2QUPmHwjpC9VaE9qZHTaFYfBFL80VuUBTnCqSgjaO/zE0ywwElanCEpl4v X-Received: by 2002:a63:5d20:: with SMTP id r32mr23980789pgb.329.1548769364148; Tue, 29 Jan 2019 05:42:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1548769364; cv=none; d=google.com; s=arc-20160816; b=S9lzmUrSA95OrIkYFOIGn6Np6gXpfyDJq9lJVtxBHjNQWttIdgflEGKB9Ds3DbKcmU 2hc7shnKyybXdr3/ZLtOiZW0v6KvTNlpd7o9YYM8nnNhn2tNiF/C7kW25xGsp4qCUNKJ ygfTsDQv8HEP0JFOtrqxAsV333Vt7vDJ66eyMg5vvRv9oJbC6nO2Sht/267vAlALDO7q GtN6J5azp8yUKdit5Mkz3xOOngGr9/7loFIpGwgrUjMLqyudiBhI8kJLTZcpdo9buVcT buBLJXiBi1xa3kwe5ZooQLXjSBFAn61o0SFlzNcN3ZJvMMYgS77d4io/ZWgh3qq7kvKa C+NQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=o6OJxOZ/I7IQv1ydQ2KqbUHQYly5SKLTE8e/VEIgzmo=; b=LSjFGVjrBkSIAyTPTCZc+tNADp5CXETQHSzDgmU9WvWTOY9FQD0FGMVka+/dVqPsxV 28C9f4zqioRdSyvL0RDdqCD49/+n3751/eu0U2IIb3Ig2gruLCmHBDTMFvcdsqXujBfj kouUnmwwNbdB1eWiOjLmNoLo+bNgUw1PpUKY9I3+erRR075QYex0pSmX3rufjyd7trw5 F+vh4kVhXWVo7e3MUwnDXM0K5DVP6gzcx+8Jnq+vANFvFY9v3CvrhzJc8mIWutPcekte K+gnAKZW1g0ehqdkRw6I0azpEwdELLYorq2lDCg7lW4UFQSj9t/J+qO5XIF164dUU2fd 8ydA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c10si34449698pgj.416.2019.01.29.05.42.27; Tue, 29 Jan 2019 05:42:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727519AbfA2NmW (ORCPT + 99 others); Tue, 29 Jan 2019 08:42:22 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:37106 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726862AbfA2NmW (ORCPT ); Tue, 29 Jan 2019 08:42:22 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C5BF1EBD; Tue, 29 Jan 2019 05:42:21 -0800 (PST) Received: from [10.1.197.45] (e112298-lin.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 38D253F59C; Tue, 29 Jan 2019 05:42:19 -0800 (PST) Subject: Re: [PATCH] arm64: fix potential deadlock in arm64-provide-pseudo-NMI-with-GICv3 To: Wei Li , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, marc.zyngier@arm.com, daniel.thompson@linaro.org, catalin.marinas@arm.com, will.deacon@arm.com, dave.martin@arm.com, mark.rutland@arm.com, jason@lakedaemon.net, huawei.libin@huawei.com, guohanjun@huawei.com, thunder.leizhen@huawei.com References: <20190129131223.32505-1-liwei391@huawei.com> From: Julien Thierry Message-ID: <37962c23-75a9-a0a1-7810-3abfb702be72@arm.com> Date: Tue, 29 Jan 2019 13:42:16 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <20190129131223.32505-1-liwei391@huawei.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Wei, Thanks testing the series. On 29/01/2019 13:12, Wei Li wrote: > In some exception handlers, the interrupt is not reenabled by daifclr at first. > The later process may call local_irq_enable() to enable the interrupt, like > gic_handle_irq(). As we known, function local_irq_enable() just change the pmr now. This is not yet in, so it might be useful to point to the series that adds this: https://lkml.org/lkml/2019/1/21/1060 > The following codes what i found may cause a deadlock or some issues else: > > do_sp_pc_abort <- el0_sp_pc > do_el0_ia_bp_hardening <- el0_ia > kgdb_roundup_cpus <- el1_dbg > > Signed-off-by: Wei Li > --- > arch/arm64/kernel/kgdb.c | 4 ++++ > arch/arm64/mm/fault.c | 6 ++++++ > 2 files changed, 10 insertions(+) > > diff --git a/arch/arm64/kernel/kgdb.c b/arch/arm64/kernel/kgdb.c > index a20de58061a8..119fbf2c0788 100644 > --- a/arch/arm64/kernel/kgdb.c > +++ b/arch/arm64/kernel/kgdb.c > @@ -25,6 +25,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -291,6 +292,9 @@ static void kgdb_call_nmi_hook(void *ignored) > > void kgdb_roundup_cpus(unsigned long flags) Hmm, I don't see this function defined in arch/arm64/kernel/kgdb.c in v5.0-rc*. Was it removed? or is that something in your local tree. > { > + if (gic_prio_masking_enabled()) > + gic_arch_enable_irqs(); > + > local_irq_enable(); Seeing we introduce the daifflags functions, with the relation described at the top of arch/arm64/include/asm/daifflags.h. I think just calling local_irq_enable() might not comply with this, as PSR.I would be clear while PSR.D is set. Maybe it should be using: local_daif_restore(DAIF_PROCCTX); > smp_call_function(kgdb_call_nmi_hook, NULL, 0); > local_irq_disable(); and here local_daif_mask(); Although I'd like to understand what you are applying the pseudo-NMI series on first. > diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c > index 97ba2ba78aee..f7c39a0b28bc 100644 > --- a/arch/arm64/mm/fault.c > +++ b/arch/arm64/mm/fault.c > @@ -32,6 +32,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -780,6 +781,8 @@ asmlinkage void __exception do_el0_ia_bp_hardening(unsigned long addr, > if (addr > TASK_SIZE) > arm64_apply_bp_hardening(); > > + if (gic_prio_masking_enabled()) > + gic_arch_enable_irqs(); > local_irq_enable(); This is not in mainline, in v5.0-rc1 there is: local_daif_restore(DAIF_PROCCTX); Which my series updates to modify both DAIF and PMR if needed. So you wouldn't need to have the gic_arch_enable_irqs(). > do_mem_abort(addr, esr, regs); > } > @@ -794,6 +797,9 @@ asmlinkage void __exception do_sp_pc_abort(unsigned long addr, > if (user_mode(regs)) { > if (instruction_pointer(regs) > TASK_SIZE) > arm64_apply_bp_hardening(); > + > + if (gic_prio_masking_enabled()) > + gic_arch_enable_irqs(); > local_irq_enable(); Same here. Thanks, -- Julien Thierry