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From:   Vineet Gupta <vineet.gupta1@synopsys.com>
To:     Eugeniy Paltsev <eugeniy.paltsev@synopsys.com>,
        "linux-snps-arc@lists.infradead.org" 
        <linux-snps-arc@lists.infradead.org>
CC:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "Alexey Brodkin" <alexey.brodkin@synopsys.com>
Subject: Re: [PATCH 2/5] ARCv2: introduce unaligned access under a Kconfig
 option
Thread-Topic: [PATCH 2/5] ARCv2: introduce unaligned access under a Kconfig
 option
Thread-Index: AQHUt8BdV97GEf2KMUGRvvMb2YNphA==
Date:   Tue, 29 Jan 2019 21:44:44 +0000
Message-ID: <C2D7FE5348E1B147BCA15975FBA23075014642D58D@US01WEMBX2.internal.synopsys.com>
References: <20190129104942.31705-1-Eugeniy.Paltsev@synopsys.com>
 <20190129104942.31705-3-Eugeniy.Paltsev@synopsys.com>
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On 1/29/19 2:49 AM, Eugeniy Paltsev wrote:=0A=
> As of today we enable unaligned access unconditionally on ARCv2.=0A=
> Lets move it under Kconfig option so we can disable it in case of=0A=
> using HW configuration which lacks of it.=0A=
>=0A=
> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>=0A=
> ---=0A=
>  arch/arc/Kconfig                      | 8 ++++++++=0A=
>  arch/arc/include/asm/irqflags-arcv2.h | 4 ++++=0A=
>  arch/arc/kernel/intc-arcv2.c          | 4 +++-=0A=
>  3 files changed, 15 insertions(+), 1 deletion(-)=0A=
>=0A=
> diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig=0A=
> index 376366a7db81..37c8aeefa3a5 100644=0A=
> --- a/arch/arc/Kconfig=0A=
> +++ b/arch/arc/Kconfig=0A=
> @@ -387,6 +387,14 @@ config ARC_HAS_SWAPE=0A=
>  =0A=
>  if ISA_ARCV2=0A=
>  =0A=
> +config ARC_USE_UNALIGNED_MEM_ACCESS=0A=
> +	bool "Handle unaligned access in HW and use it"=0A=
> +	default y=0A=
> +	help=0A=
> +	  The ARC HS architecture supports unaligned memory access=0A=
> +	  which is disabled by default. Enable unaligned access in=0A=
> +	  hardware and use it in software.=0A=
> +=0A=
>  config ARC_HAS_LL64=0A=
>  	bool "Insn: 64bit LDD/STD"=0A=
>  	help=0A=
> diff --git a/arch/arc/include/asm/irqflags-arcv2.h b/arch/arc/include/asm=
/irqflags-arcv2.h=0A=
> index 8a4f77ea3238..9b911e2c6b31 100644=0A=
> --- a/arch/arc/include/asm/irqflags-arcv2.h=0A=
> +++ b/arch/arc/include/asm/irqflags-arcv2.h=0A=
> @@ -44,8 +44,12 @@=0A=
>  #define ARCV2_IRQ_DEF_PRIO	1=0A=
>  =0A=
>  /* seed value for status register */=0A=
> +#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS=0A=
>  #define ISA_INIT_STATUS_BITS	(STATUS_IE_MASK | STATUS_AD_MASK | \=0A=
>  					(ARCV2_IRQ_DEF_PRIO << 1))=0A=
> +#else=0A=
> +#define ISA_INIT_STATUS_BITS	(STATUS_IE_MASK | (ARCV2_IRQ_DEF_PRIO << 1)=
)=0A=
> +#endif /* CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS */=0A=
=0A=
I'd prefer to change the define of STATUS_AD_MASK itself and keep all of th=
is=0A=
unchanged !=0A=
=0A=
>  =0A=
>  #ifndef __ASSEMBLY__=0A=
>  =0A=
> diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c=
=0A=
> index 067ea362fb3e..84b1c7157d1b 100644=0A=
> --- a/arch/arc/kernel/intc-arcv2.c=0A=
> +++ b/arch/arc/kernel/intc-arcv2.c=0A=
> @@ -93,7 +93,9 @@ void arc_init_IRQ(void)=0A=
>  =0A=
>  	/* setup status32, don't enable intr yet as kernel doesn't want */=0A=
>  	tmp =3D read_aux_reg(ARC_REG_STATUS32);=0A=
> -	tmp |=3D STATUS_AD_MASK | (ARCV2_IRQ_DEF_PRIO << 1);=0A=
> +	if (IS_ENABLED(ARC_USE_UNALIGNED_MEM_ACCESS))=0A=
> +		tmp |=3D STATUS_AD_MASK;=0A=
> +	tmp |=3D ARCV2_IRQ_DEF_PRIO << 1;=0A=
=0A=
This will change after rebase as we just need to delete the code here, done=
 in head.S=0A=
=0A=
>  	tmp &=3D ~STATUS_IE_MASK;=0A=
>  	asm volatile("kflag %0	\n"::"r"(tmp));=0A=
>  }=0A=
=0A=