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[79.136.29.16]) by smtp.gmail.com with ESMTPSA id q67sm176734lfe.19.2019.01.30.00.40.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 30 Jan 2019 00:40:07 -0800 (PST) From: Jonas Bonn To: linux-kernel@vger.kernel.org Cc: Jonas Bonn Subject: [PATCH v6 0/2] spi: support inter-word delays Date: Wed, 30 Jan 2019 09:40:03 +0100 Message-Id: <20190130084005.18649-1-jonas@norrbonn.se> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Changed in v6: * Changed name of field word_delay_us to word_delay_usecs as per suggestion in patch review * Add Nicolas' ACK to spi-atmel patch Changed in v5: * Rebased on linux-next * Fixed up Atmel patch to simplify register setting Changed in v4: * Rename word_delay to word_delay_us and slot it in _beside_ the existing word_delay parameter in spi_transfer (see commit message for more info). * Add code to __spi_validate to make sure transfer and device align with respect to the word_delay_us parameter Changed in v3: * Drop setting of inter-word delay via device tree Changed in v2: * Fix atmel-spi driver to not unconditionally set minimal delay if no delay is required (erroneous clamping) This short series adds support for SPI inter-word delays and configures the spi-atmel driver to honour the setting. Some SPI slaves are so slow that they are unable to keep up even at the SPI controller's lowest available clock frequency. I have such a configuration where an AVR-based SPI slave is unable to feed the SPI bus fast enough even the SPI master runs at the lowest possible clock speed. Jonas Bonn (2): spi: support inter-word delay requirement for devices spi-atmel: support inter-word delay drivers/spi/spi-atmel.c | 11 ++++++----- drivers/spi/spi.c | 5 +++++ include/linux/spi/spi.h | 6 ++++++ 3 files changed, 17 insertions(+), 5 deletions(-) -- 2.19.1