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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id l9sm708691otj.9.2019.01.30.08.41.37 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 30 Jan 2019 08:41:37 -0800 (PST) Date: Wed, 30 Jan 2019 10:41:36 -0600 From: Rob Herring To: Jiaxun Yang Cc: linux-mips@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, mark.rutland@arm.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v3 2/2] dt-bindings: interrupt-controller: loongson ls1x intc Message-ID: <20190130164136.GB31687@bogus> References: <20190122154557.22689-1-jiaxun.yang@flygoat.com> <20190124032730.18237-1-jiaxun.yang@flygoat.com> <20190124032730.18237-3-jiaxun.yang@flygoat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190124032730.18237-3-jiaxun.yang@flygoat.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jan 24, 2019 at 11:27:30AM +0800, Jiaxun Yang wrote: > Dt-bindings doc about Loongson-1 interrupt controller > > Signed-off-by: Jiaxun Yang > --- > .../loongson,ls1x-intc.txt | 24 +++++++++++++++++++ > 1 file changed, 24 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt > new file mode 100644 > index 000000000000..a4e17c3f5f93 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt > @@ -0,0 +1,24 @@ > +Loongson ls1x Interrupt Controller > + > +Required properties: > + > +- compatible : should be "loongson,ls1x-intc". Valid strings are: > + > +- reg : Specifies base physical address and size of the registers. > +- interrupt-controller : Identifies the node as an interrupt controller > +- #interrupt-cells : Specifies the number of cells needed to encode an > + interrupt source. The value shall be 1. > +- interrupts : Specifies the CPU interrupts the controller is connected to. > + > +Example: > + > +intc: interrupt-controller@1fd01040 { > + compatible = "loongson,ls1x-intc"; > + reg = <0x1fd01040 0x78>; > + > + interrupt-controller; > + #interrupt-cells = <1>; > + > + interrupt-parent = <&cpu_intc>; > + interrupts = <2>, <3>, <4>, <5>, <6>; > +}; > \ No newline at end of file Please fix. Otherwise, Reviewed-by: Rob Herring