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[209.132.180.67]) by mx.google.com with ESMTP id p12si1923043pgl.106.2019.01.30.09.45.52; Wed, 30 Jan 2019 09:46:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=MZNG4yQG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732666AbfA3RnZ (ORCPT + 99 others); Wed, 30 Jan 2019 12:43:25 -0500 Received: from mail.kernel.org ([198.145.29.99]:58606 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732527AbfA3RnY (ORCPT ); Wed, 30 Jan 2019 12:43:24 -0500 Received: from bbrezillon (91-160-177-164.subs.proxad.net [91.160.177.164]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 38D6E2087F; Wed, 30 Jan 2019 17:43:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1548870203; bh=3XBGqaxbIgirgGdiwL2FpJd4AZ+2J/mt9qBsXw7eYSs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=MZNG4yQGUa+lUxsCA/fw9zcPYVkyoxVdiFJfMqbl7klNSZ8SzkkgavUmTo7bC+quu 2BXZZAiNHyHGfji9HE/JWb6YRlXhhxe/1hGuEacutxk//vsBkiM1oRPvsAE7hXewUv pp1+i8nlTK8nNJBlSfOvAIv2JFZu6D41PmtvBMME= Date: Wed, 30 Jan 2019 18:43:13 +0100 From: Boris Brezillon To: Cc: , , , , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org Subject: Re: [PATCH 9/9] spi: atmel-quadspi: add support for sam9x60 qspi controller Message-ID: <20190130184313.281f5374@bbrezillon> In-Reply-To: <20190130150818.24902-10-tudor.ambarus@microchip.com> References: <20190130150818.24902-1-tudor.ambarus@microchip.com> <20190130150818.24902-10-tudor.ambarus@microchip.com> X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 30 Jan 2019 15:08:47 +0000 wrote: > +static int atmel_sam9x60_qspi_clk_prepare_enable(struct atmel_qspi *aq) > +{ > + struct device *dev = &aq->pdev->dev; > + int ret; > + > + if (!aq->clk) { > + /* Get the peripheral clock */ > + aq->clk = devm_clk_get(dev, "pclk"); > + if (IS_ERR(aq->clk)) { > + dev_err(dev, "missing peripheral clock\n"); > + return PTR_ERR(aq->clk); > + } > + } > + > + if (!aq->qspick) { > + /* Get the QSPI system clock */ > + aq->qspick = devm_clk_get(dev, "qspick"); > + if (IS_ERR(aq->qspick)) { > + dev_err(dev, "missing system clock\n"); > + return PTR_ERR(aq->qspick); > + } > + } Move the devm_clk_get() calls to the probe path instead of doing it at prepare time, and you can make it generic for both compats with something like: aq->clk = devm_clk_get(dev, "pclk"); if (IS_ERR(aq->clk)) aq->clk = devm_clk_get(dev, NULL); if (IS_ERR(aq->clk)) return PTR_ERR(aq->clk); if (aq->caps->qspick_required) { aq->qspick = devm_clk_get(dev, "qspick"); if (IS_ERR(aq->qspick)) { return PTR_ERR(aq->qspick); } > + > + /* Enable the peripheral clock */ > + ret = clk_prepare_enable(aq->clk); > + if (ret) { > + dev_err(dev, "failed to enable the peripheral clock\n"); > + return ret; > + } > + > + /* Enable the QSPI system clock */ > + ret = clk_prepare_enable(aq->qspick); > + if (ret) { > + dev_err(dev, "failed to enable the QSPI system clock\n"); > + clk_disable_unprepare(aq->clk); > + } Again, you can make the enable function generic since clk_prepare_enable(NULL) is a NO-OP that returns 0 and aq->qspick will be NULL when it's not required. > + > + return ret; > +} > + > +static void atmel_sam9x60_qspi_clk_disable_unprepare(struct atmel_qspi *aq) > +{ > + clk_disable_unprepare(aq->qspick); > + clk_disable_unprepare(aq->clk); Ditto. > +}