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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id t2sm795044otl.4.2019.01.30.10.49.22 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 30 Jan 2019 10:49:22 -0800 (PST) Date: Wed, 30 Jan 2019 12:49:22 -0600 From: Rob Herring To: "Z.q. Hou" Cc: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" , "catalin.marinas@arm.com" , "will.deacon@arm.com" , Mingkai Hu , "M.h. Lian" , Xiaowei Bao , "Z.q. Hou" Subject: Re: [PATCHv3 22/27] dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller Message-ID: <20190130184922.GA13423@bogus> References: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com> <20190129080926.36773-23-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190129080926.36773-23-Zhiqiang.Hou@nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 29 Jan 2019 08:10:49 +0000, "Z.q. Hou" wrote: > From: Hou Zhiqiang > > Add PCIe Gen4 controller DT bindings of NXP Layerscape SoCs. > > Signed-off-by: Hou Zhiqiang > --- > V3: > - Change back to use an new doc for Layerscape PCIe Gen4 DT bindings. > - Switch the order of "csr_axi_slave" and "config_axi_slave". > > .../bindings/pci/layerscape-pci-gen4.txt | 52 +++++++++++++++++++ > MAINTAINERS | 8 +++ > 2 files changed, 60 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt > Reviewed-by: Rob Herring