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[209.132.180.67]) by mx.google.com with ESMTP id r11si2539463pgg.327.2019.01.30.17.23.27; Wed, 30 Jan 2019 17:23:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729782AbfAaBVq (ORCPT + 99 others); Wed, 30 Jan 2019 20:21:46 -0500 Received: from Mailgw01.mediatek.com ([1.203.163.78]:1637 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725535AbfAaBVq (ORCPT ); Wed, 30 Jan 2019 20:21:46 -0500 X-UUID: dae1179582aa47d98cf2a189da79bb9e-20190131 X-UUID: dae1179582aa47d98cf2a189da79bb9e-20190131 Received: from mtkcas35.mediatek.inc [(172.27.4.250)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 717309081; Thu, 31 Jan 2019 09:21:40 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS31DR.mediatek.inc (172.27.6.102) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 31 Jan 2019 09:21:38 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 31 Jan 2019 09:21:38 +0800 Message-ID: <1548897698.22019.5.camel@mhfsdcap03> Subject: Re: [PATCH] PCI: Mediatek: Use resource_size function on resource object From: Honghui Zhang To: Lorenzo Pieralisi CC: Bjorn Helgaas , , , , , , , Date: Thu, 31 Jan 2019 09:21:38 +0800 In-Reply-To: <20190130163155.GA5847@e107981-ln.cambridge.arm.com> References: <1546409033-20412-1-git-send-email-honghui.zhang@mediatek.com> <20190130123347.GB30991@e107981-ln.cambridge.arm.com> <20190130155853.GE229773@google.com> <20190130163155.GA5847@e107981-ln.cambridge.arm.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2019-01-30 at 16:31 +0000, Lorenzo Pieralisi wrote: > On Wed, Jan 30, 2019 at 09:58:53AM -0600, Bjorn Helgaas wrote: > > On Wed, Jan 30, 2019 at 12:33:47PM +0000, Lorenzo Pieralisi wrote: > > > On Wed, Jan 02, 2019 at 02:03:53PM +0800, honghui.zhang@mediatek.com wrote: > > > > From: Honghui Zhang > > > > > > > > drivers/pci/pcie-mediatek.c:720:13-16: WARNING: Suspicious code. resource_size is maybe missing with mem > > > > > > > > Generated by: scripts/coccinelle/api/resource_size.cocci > > > > > > > > Signed-off-by: Honghui Zhang > > > > --- > > > > drivers/pci/controller/pcie-mediatek.c | 4 +--- > > > > 1 file changed, 1 insertion(+), 3 deletions(-) > > > > > > > > diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c > > > > index e307166..0168376 100644 > > > > --- a/drivers/pci/controller/pcie-mediatek.c > > > > +++ b/drivers/pci/controller/pcie-mediatek.c > > > > @@ -654,7 +654,6 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) > > > > struct resource *mem = &pcie->mem; > > > > const struct mtk_pcie_soc *soc = port->pcie->soc; > > > > u32 val; > > > > - size_t size; > > > > int err; > > > > > > > > /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */ > > > > @@ -706,8 +705,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) > > > > mtk_pcie_enable_msi(port); > > > > > > > > /* Set AHB to PCIe translation windows */ > > > > - size = mem->end - mem->start; > > > > - val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(size)); > > > > + val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(resource_size(mem))); > > > > > > checkpatch warns on this line, please make sure patches pass it before > > > posting them. > > > > I didn't actually run checkpatch myself, so I don't know why it > > complained. > > WARNING: line over 80 characters > #35: FILE: drivers/pci/controller/pcie-mediatek.c:708: > + val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(resource_size(mem))); > > I do run it as a sanity check. > > > The patch you merged moves "mem_size = resource_size(mem)" higher up, > > away from the previous location and its use, which makes it a little > > harder to read. > > That's because it was how the original code (which as you pointed out > is likely buggy) was written. > > Anyway patch dropped waiting for a v2 consistent with your review - > apologies for missing some key review points. > Thanks for your comments, I will send a v2 and fix all the issue you pointed out. > Lorenzo