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[209.132.180.67]) by mx.google.com with ESMTP id u6si4791793pfb.92.2019.01.31.05.46.06; Thu, 31 Jan 2019 05:46:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=DEfqdyST; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732696AbfAaNmD (ORCPT + 99 others); Thu, 31 Jan 2019 08:42:03 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:38550 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387701AbfAaNkC (ORCPT ); Thu, 31 Jan 2019 08:40:02 -0500 Received: by mail-wm1-f65.google.com with SMTP id m22so2601158wml.3 for ; Thu, 31 Jan 2019 05:40:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K4gOMPK7JwLenHksVrX0ybAt1GIcZsGbGGGhyJXhtdY=; b=DEfqdyST9YAEVz1EtV/pIdW8aoBrW256e9qVHmBeUZDofeRTYA9P6vaW1Cm/2LzvOy koCL5xjTAw6olPhlaZyfP34LRP0LcUXO65jiHZ+XiPTfzby08xryJi1xl1Kpk2iFROt6 7fB2ZyGa+0j5aZKMQ4BvIARpTo22GoB4OVWLlvaB6sxRl2RI5+HdyQTsNaPOM70gyJNK KDSAe838+rOu9vXhRJuyGtEMl7rp+j4VTPUl5bkcVHuSYHa8MBolPzKAMl1D8DV0uOHx nvNiLQ39EUH/bcpnDQDiNNICA0Da3/BSiJyJveyEfnfn3zjZtD+BQebEOCqLSnMNCBa4 QKVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K4gOMPK7JwLenHksVrX0ybAt1GIcZsGbGGGhyJXhtdY=; b=OfCGuPOHfJFqUKAf94bIpV/TLxYC78MA7r28nTxfkccUY1du/Pk3TDcFH1O2Ohl5Ba Wt5xRmvN3WvI9h+AN3lKnWmK27vHi8kroropv/kYWABlWZFZnunnUPPMNKJU5sgUGNzl p1YqzI11Y6PHT2zIimIsBQqVgXm6/xVYKPq6ZI2HnjprpzUfGk1vyRbOWirBMaNr6COY SX0jXTYc4DOx8cmhSU/jbZJdVBLykSVVnSDLcyW9E78skacNbKopB5s0O8t0yyhfbyWA tum3Mkl1hSdHRyuPNf3reY5uQLJ1AggcBHy6FqwlxUKVu5cKSsLfqAL4iJy4c/GW8zYc SdLw== X-Gm-Message-State: AJcUukeUPkM45jepN4vvbPiIXHIClkcR39nL2kF4yKb43rehGgaUe6z5 DA2dUxZxaE9koOJulOIq/SS+wQ== X-Received: by 2002:a1c:a3c3:: with SMTP id m186mr29414917wme.16.1548941999661; Thu, 31 Jan 2019 05:39:59 -0800 (PST) Received: from debian-brgl.home ([2a01:cb1d:af:5b00:6d6c:8493:1ab5:dad7]) by smtp.gmail.com with ESMTPSA id h10sm5479768wmf.44.2019.01.31.05.39.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 31 Jan 2019 05:39:59 -0800 (PST) From: Bartosz Golaszewski To: Sekhar Nori , Kevin Hilman , Thomas Gleixner , Jason Cooper , Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH 15/35] ARM: davinci: aintc: use the new config structure Date: Thu, 31 Jan 2019 14:39:08 +0100 Message-Id: <20190131133928.17985-16-brgl@bgdev.pl> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190131133928.17985-1-brgl@bgdev.pl> References: <20190131133928.17985-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bartosz Golaszewski Modify the aintc driver to take all its configuration from the new config structure. Stop referencing davinci_soc_info in any way. Move the declaration for davinci_aintc_init() to irq-davinci-aintc.h and make it take the new config structure as parameter. Convert all users to the new version. Signed-off-by: Bartosz Golaszewski --- arch/arm/mach-davinci/dm355.c | 2 +- arch/arm/mach-davinci/dm365.c | 2 +- arch/arm/mach-davinci/dm644x.c | 2 +- arch/arm/mach-davinci/dm646x.c | 2 +- arch/arm/mach-davinci/include/mach/common.h | 2 -- arch/arm/mach-davinci/irq.c | 35 ++++++++++++--------- include/linux/irqchip/irq-davinci-aintc.h | 2 ++ 7 files changed, 26 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 0dcfcbec522a..a0bfb3602136 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -751,7 +751,7 @@ static const struct davinci_aintc_config dm355_aintc_config = { void __init dm355_init_irqs(void) { - davinci_aintc_init(); + davinci_aintc_init(&dm355_aintc_config); } static int __init dm355_init_devices(void) diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 1878c97e5df5..eab575873255 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1008,7 +1008,7 @@ static const struct davinci_aintc_config dm365_aintc_config = { void __init dm365_init_irqs(void) { - davinci_aintc_init(); + davinci_aintc_init(&dm365_aintc_config); } static int __init dm365_init_devices(void) diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 5c48a5e4090b..24ad7a09aa15 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -685,7 +685,7 @@ static const struct davinci_aintc_config dm644x_aintc_config = { void __init dm644x_init_irqs(void) { - davinci_aintc_init(); + davinci_aintc_init(&dm644x_aintc_config); } void __init dm644x_init_devices(void) diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index e06ea3b61011..ab02cc93813a 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -646,7 +646,7 @@ static const struct davinci_aintc_config dm646x_aintc_config = { void __init dm646x_init_irqs(void) { - davinci_aintc_init(); + davinci_aintc_init(&dm646x_aintc_config); } static int __init dm646x_init_devices(void) diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 9cf3a36a802a..9e06974c85bb 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -19,8 +19,6 @@ void davinci_timer_init(struct clk *clk); -extern void davinci_aintc_init(void); - struct davinci_timer_instance { u32 base; u32 bottom_irq; diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c index b31821e89a46..d67f443a471d 100644 --- a/arch/arm/mach-davinci/irq.c +++ b/arch/arm/mach-davinci/irq.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include @@ -77,13 +78,14 @@ davinci_aintc_handle_irq(struct pt_regs *regs) } /* ARM Interrupt Controller Initialization */ -void __init davinci_aintc_init(void) +void __init davinci_aintc_init(const struct davinci_aintc_config *config) { - unsigned i, j; - const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios; + unsigned int irq_off, reg_off, prio, shift; int rv, irq_base; + const u8 *prios; - davinci_aintc_base = ioremap(davinci_soc_info.intc_base, SZ_4K); + davinci_aintc_base = ioremap(config->reg.start, + resource_size(&config->reg)); if (WARN_ON(!davinci_aintc_base)) return; @@ -109,22 +111,22 @@ void __init davinci_aintc_init(void) davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0); davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1); - for (i = DAVINCI_AINTC_IRQ_INTPRI0_REG; i <= DAVINCI_AINTC_IRQ_INTPRI7_REG; i += 4) { - u32 pri; + prios = config->prios; - for (j = 0, pri = 0; j < 32; j += 4, davinci_def_priorities++) - pri |= (*davinci_def_priorities & 0x07) << j; - davinci_aintc_writel(pri, i); + for (reg_off = DAVINCI_AINTC_IRQ_INTPRI0_REG; + reg_off <= DAVINCI_AINTC_IRQ_INTPRI7_REG; reg_off += 4) { + for (shift = 0, prio = 0; shift < 32; shift += 4, prios++) + prio |= (*prios & 0x07) << shift; + davinci_aintc_writel(prio, reg_off); } - irq_base = irq_alloc_descs(-1, 0, davinci_soc_info.intc_irq_num, 0); + irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0); if (WARN_ON(irq_base < 0)) return; davinci_aintc_irq_domain = irq_domain_add_legacy(NULL, - davinci_soc_info.intc_irq_num, - irq_base, 0, &irq_domain_simple_ops, - NULL); + config->num_irqs, irq_base, 0, + &irq_domain_simple_ops, NULL); if (WARN_ON(!davinci_aintc_irq_domain)) return; @@ -134,8 +136,11 @@ void __init davinci_aintc_init(void) if (WARN_ON(rv)) return; - for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num; i += 32, j += 0x04) - davinci_aintc_setup_gc(davinci_aintc_base + j, irq_base + i, 32); + for (irq_off = 0, reg_off = 0; + irq_off < config->num_irqs; + irq_off += 32, reg_off += 0x04) + davinci_aintc_setup_gc(davinci_aintc_base + reg_off, + irq_base + irq_off, 32); irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq); set_handle_irq(davinci_aintc_handle_irq); diff --git a/include/linux/irqchip/irq-davinci-aintc.h b/include/linux/irqchip/irq-davinci-aintc.h index d488e798bbef..cc851d58f07f 100644 --- a/include/linux/irqchip/irq-davinci-aintc.h +++ b/include/linux/irqchip/irq-davinci-aintc.h @@ -14,4 +14,6 @@ struct davinci_aintc_config { u8 *prios; }; +void davinci_aintc_init(const struct davinci_aintc_config *config); + #endif /* _LINUX_IRQ_DAVINCI_AINTC_ */ -- 2.20.1