Received: by 2002:ad5:474a:0:0:0:0:0 with SMTP id i10csp7225831imu; Thu, 31 Jan 2019 07:01:42 -0800 (PST) X-Google-Smtp-Source: ALg8bN6Fa828CJs9Lgxd91pl1uO7SZQWrROLTIyTn0zl8l0St9lPDDGDA1RDKhnG4MInBhmokJO/ X-Received: by 2002:a17:902:930b:: with SMTP id bc11mr35948558plb.17.1548946902734; Thu, 31 Jan 2019 07:01:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1548946902; cv=none; d=google.com; s=arc-20160816; b=vLnAY9m7JfE4R7l2FQantvqutON7KV9Ijs+PiUeOdsW+y6APZ8+wwrBOaOi6Hk1J59 zh1JYSAPAfZNVOfj6G52iSlTht6sXluI57bnwPpGmFRDv7cnSn8T57goUKKcSx3Fax4h Tem74eYZVfgpECQax8+OjUGkEQ8tJp/440+4+ezLbBpKmmvhpFEsyldfbdJ+sCgtjMLN vggiihbF4PIXkY6mVI3y4J8DRh1Mq/jqG0ZslWhswXnQvBNvnUZVeGOb+1fGjo9j1yEJ igEd5q/CTRUXC5ykt8iCSnm3GdG9vc6EYFClWFIFlw6OQ089g4yAx8sqtyibEVgjW8n8 FYew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=xPlZFaCNImu0YFTMpEzwpV5BPsDC2XICNWq5nZq5/SI=; b=mE4LjFd8z25i8vs5Pv/Ozr2w3xpd0dYxbhKvn3VsP80tvaWP6yMX25j7+4vquOdc85 ttyozY7efoaVHD7Ta8dsdN/nU1AAvoPT74Mk971ZIWCJY1IeHsX4x9p9J6RS5iZM58gQ i5p6nXJI8b7U+Z3r4ryo5E7qrLc6hB4Y0T1X/Xoqf/rVYJQcrC7m+A4cReJn2s4U7zn3 sp6HmSEQIElVd/5bO9OCo0LqGTA33i08qy1rsbQi+fmh1OFrVKgumB2zcY6YJj94WOog Dcoqq8jFaoUsSxWiR+nD1SDjTohU9QSwCPk65vSc6BuObU9hlYSHFbV+PhPYaFxd9j01 jMVA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m9si4605104pll.349.2019.01.31.07.01.26; Thu, 31 Jan 2019 07:01:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731697AbfAaPAk (ORCPT + 99 others); Thu, 31 Jan 2019 10:00:40 -0500 Received: from foss.arm.com ([217.140.101.70]:45684 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1733045AbfAaO77 (ORCPT ); Thu, 31 Jan 2019 09:59:59 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CE1B0EBD; Thu, 31 Jan 2019 06:59:58 -0800 (PST) Received: from e112298-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D579E3F59C; Thu, 31 Jan 2019 06:59:56 -0800 (PST) From: Julien Thierry To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, daniel.thompson@linaro.org, joel@joelfernandes.org, marc.zyngier@arm.com, christoffer.dall@arm.com, james.morse@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, Julien Thierry Subject: [PATCH v10 18/25] arm64: gic-v3: Implement arch support for priority masking Date: Thu, 31 Jan 2019 14:58:56 +0000 Message-Id: <1548946743-38979-19-git-send-email-julien.thierry@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1548946743-38979-1-git-send-email-julien.thierry@arm.com> References: <1548946743-38979-1-git-send-email-julien.thierry@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Implement architecture specific primitive allowing the GICv3 driver to use priorities to mask interrupts. Signed-off-by: Julien Thierry Suggested-by: Daniel Thompson Acked-by: Marc Zyngier Cc: Marc Zyngier Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/arch_gicv3.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h index b5f8142..14b41dd 100644 --- a/arch/arm64/include/asm/arch_gicv3.h +++ b/arch/arm64/include/asm/arch_gicv3.h @@ -22,6 +22,7 @@ #ifndef __ASSEMBLY__ +#include #include #include #include @@ -162,14 +163,13 @@ static inline bool gic_prio_masking_enabled(void) static inline void gic_pmr_mask_irqs(void) { - /* Should not get called yet. */ - WARN_ON_ONCE(true); + BUILD_BUG_ON(GICD_INT_DEF_PRI <= GIC_PRIO_IRQOFF); + gic_write_pmr(GIC_PRIO_IRQOFF); } static inline void gic_arch_enable_irqs(void) { - /* Should not get called yet. */ - WARN_ON_ONCE(true); + asm volatile ("msr daifclr, #2" : : : "memory"); } #endif /* __ASSEMBLY__ */ -- 1.9.1