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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 85b4ef26-e83a-4d62-5307-08d687974ee6 X-MS-Exchange-CrossTenant-originalarrivaltime: 31 Jan 2019 16:15:22.9472 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR11MB1874 X-OriginatorOrg: microchip.com Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tudor Ambarus Patches from 1 to 8 are minor fixes or cosmetics. Patches 9 and 10 introduce the sam9x60 qspi controller. sam9x60 qspi controller tested with sst26vf064b jedec,spi-nor flash. Backward compatibility test done on sama5d2 qspi controller and mx25l25635e jedec,spi-nor flash. The patches are generated on top of for-next branch. v2: - cache MR value, - drop iomem wrappers, - make "pclk" clock-name mandatory even for sama5d2, - rework clock handling, - reorder setting of register values in set_cfg() calls, - collect R-b tags. Tudor Ambarus (10): spi: atmel-quadspi: cache MR value to avoid a write access spi: atmel-quadspi: order header files inclusion alphabetically spi: atmel-quadspi: drop wrappers for iomem accesses spi: atmel-quadspi: fix naming scheme spi: atmel-quadspi: remove unnecessary cast spi: atmel-quadspi: return appropriate error code spi: atmel-quadspi: switch to SPDX license identifiers dt-bindings: spi: atmel-quadspi: update example to new clock binding dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60 spi: atmel-quadspi: add support for sam9x60 qspi controller .../devicetree/bindings/spi/atmel-quadspi.txt | 14 +- drivers/spi/atmel-quadspi.c | 374 +++++++++++++++--= ---- 2 files changed, 281 insertions(+), 107 deletions(-) --=20 2.9.5