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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: de2d4e66-f3bc-4195-78e4-08d688c3ee4b X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Feb 2019 04:07:19.6009 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR11MB1300 X-OriginatorOrg: microchip.com Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tudor Ambarus Let general names to core drivers. Signed-off-by: Tudor Ambarus --- v3: no change v2: update after the removing of iomem access wrappers drivers/spi/atmel-quadspi.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c index 131374db0db4..47ed751a91e7 100644 --- a/drivers/spi/atmel-quadspi.c +++ b/drivers/spi/atmel-quadspi.c @@ -158,14 +158,14 @@ struct atmel_qspi { struct completion cmd_completion; }; =20 -struct qspi_mode { +struct atmel_qspi_mode { u8 cmd_buswidth; u8 addr_buswidth; u8 data_buswidth; u32 config; }; =20 -static const struct qspi_mode sama5d2_qspi_modes[] =3D { +static const struct atmel_qspi_mode sama5d2_qspi_modes[] =3D { { 1, 1, 1, QSPI_IFR_WIDTH_SINGLE_BIT_SPI }, { 1, 1, 2, QSPI_IFR_WIDTH_DUAL_OUTPUT }, { 1, 1, 4, QSPI_IFR_WIDTH_QUAD_OUTPUT }, @@ -175,8 +175,8 @@ static const struct qspi_mode sama5d2_qspi_modes[] =3D = { { 4, 4, 4, QSPI_IFR_WIDTH_QUAD_CMD }, }; =20 -static inline bool is_compatible(const struct spi_mem_op *op, - const struct qspi_mode *mode) +static inline bool atmel_qspi_is_compatible(const struct spi_mem_op *op, + const struct atmel_qspi_mode *mode) { if (op->cmd.buswidth !=3D mode->cmd_buswidth) return false; @@ -190,12 +190,12 @@ static inline bool is_compatible(const struct spi_mem= _op *op, return true; } =20 -static int find_mode(const struct spi_mem_op *op) +static int atmel_qspi_find_mode(const struct spi_mem_op *op) { u32 i; =20 for (i =3D 0; i < ARRAY_SIZE(sama5d2_qspi_modes); i++) - if (is_compatible(op, &sama5d2_qspi_modes[i])) + if (atmel_qspi_is_compatible(op, &sama5d2_qspi_modes[i])) return i; =20 return -1; @@ -204,7 +204,7 @@ static int find_mode(const struct spi_mem_op *op) static bool atmel_qspi_supports_op(struct spi_mem *mem, const struct spi_mem_op *op) { - if (find_mode(op) < 0) + if (atmel_qspi_find_mode(op) < 0) return false; =20 /* special case not supported by hardware */ @@ -234,7 +234,7 @@ static int atmel_qspi_exec_op(struct spi_mem *mem, cons= t struct spi_mem_op *op) aq->smm =3D QSPI_MR_SMM; } =20 - mode =3D find_mode(op); + mode =3D atmel_qspi_find_mode(op); if (mode < 0) return -ENOTSUPP; =20 --=20 2.9.5