Received: by 2002:ac0:8c9a:0:0:0:0:0 with SMTP id r26csp2145792ima; Sat, 2 Feb 2019 15:20:59 -0800 (PST) X-Google-Smtp-Source: AHgI3Ib4PAQBEW0z9WCLnBu4n3O38KF1T00oY2TH9IaVmhnOTf7tEL5Vejl+NHHNO84NfjauUfgf X-Received: by 2002:a63:454a:: with SMTP id u10mr283741pgk.224.1549149659184; Sat, 02 Feb 2019 15:20:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549149659; cv=none; d=google.com; s=arc-20160816; b=QPdCFb8SYCSrFngbdzBZ+5g63wlrCleZEFtUq1QtwJzUsR0jNYDIV7y5Y8QH+vyXM8 rq42chzWtLkuCvvJwejHoaKPDoBTgFrKVh4IP0UbyIgfuyTvJzIYpC1xaDFw9ShLQpk4 gqsANUogCtYED7LdlhWSW/TpBta9c6187lrlHB4szpW01lmX0J8NlEa4XGMMkcQF6Jhj 62fifeBDrzbd2sYYAtRdaa71yUCY7fYIIj8sYteHH1XgQvn0NR8z+hEMrp9EGPiv/wOO XzNXApAysjR2GTBpcoqES8EpOZQv1Z4RlFwezmS8TGgqSQ8a81+pkZH0NJx7+EBfPKWq 8fxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=vVN5VtadRVOJSLQl/c/1jRVzXuFZu0B1bzeIau0Tvdw=; b=0Nu30VBQGlkX+HHv784c7pSO3iuMKLKsCjrS0c3n5SufnHaC7Uj/h8eLxx42OR5GHE 9FJJ2c245z+3CzrV2Y2/LeTwbYjbLqN6dd6cc0kzs2T62KsYXQMIDLNnzqkBC6K10/wd UX2YiMpsAjGLgGECCM2hl46ywzZUI0Iit8bdAhbW5CCeK23YCGmYJktIQp0VO/5ZQ/VM wnLZzvgIMPTZZeX2L3Ut2p0CKc0jCu9zaoSkdr7+bop1X6YZP3iALGwfaOPRuCEqa/E4 eTE8OfQmNJt2HdHTFVIgPpDIm0jCbBOY0Y/iXp8DXc2XPcFvXZwKNcOWKj0qJOz17Id1 Fu0A== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@crapouillou.net header.s=mail header.b=yR5u+quP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a19si11171776pgj.429.2019.02.02.15.20.43; Sat, 02 Feb 2019 15:20:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@crapouillou.net header.s=mail header.b=yR5u+quP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727394AbfBBXUO (ORCPT + 99 others); Sat, 2 Feb 2019 18:20:14 -0500 Received: from outils.crapouillou.net ([89.234.176.41]:53260 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727205AbfBBXUM (ORCPT ); Sat, 2 Feb 2019 18:20:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1549149609; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=vVN5VtadRVOJSLQl/c/1jRVzXuFZu0B1bzeIau0Tvdw=; b=yR5u+quPqVo06NiV7bOYHcvs2r1r/zdVFBZTsf7SYSQ0ndCXbLWQqpKlNpb+irZvnHplAb m7meO7ch8WzXtxUXXvHWEpXVsoIFVcdkSwAnETXgb5onXheo2yP3ZZ5B1dWYAEFtjr1Xuh RYv13uFNEFVn5PC+owvkOLigPkuVQJ4= From: Paul Cercueil To: David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , Rob Herring , Mark Rutland , Miquel Raynal , Harvey Hunt Cc: Mathieu Malaterre , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Cercueil Subject: [PATCH v2 5/9] mtd: rawnand: jz4780: Add ooblayout for the JZ4725B Date: Sat, 2 Feb 2019 20:19:22 -0300 Message-Id: <20190202231926.2444-6-paul@crapouillou.net> In-Reply-To: <20190202231926.2444-1-paul@crapouillou.net> References: <20190202231926.2444-1-paul@crapouillou.net> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The boot ROM of the JZ4725B SoC expects a specific OOB layout on the NAND. Add an optional "ingenic,oob-layout" device property. When set to "ingenic,jz4725b", this specific OOB layout is used. Signed-off-by: Paul Cercueil --- Changes: v2: Instead of forcing the OOB layout, leave it to the board code or devicetree to decide if the jz4725b-specific layout should be used or not. drivers/mtd/nand/raw/ingenic/jz4780_nand.c | 51 +++++++++++++++++++++- 1 file changed, 50 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/ingenic/jz4780_nand.c b/drivers/mtd/nand/raw/ingenic/jz4780_nand.c index c0855fef7735..baebb9a5c7c8 100644 --- a/drivers/mtd/nand/raw/ingenic/jz4780_nand.c +++ b/drivers/mtd/nand/raw/ingenic/jz4780_nand.c @@ -44,6 +44,7 @@ struct jz4780_nand_cs { struct jz4780_nand_controller { struct device *dev; const struct jz_soc_info *soc_info; + const struct mtd_ooblayout_ops *oob_layout; struct jz4780_bch *bch; struct nand_controller controller; unsigned int num_banks; @@ -213,7 +214,7 @@ static int jz4780_nand_attach_chip(struct nand_chip *chip) return -EINVAL; } - mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); + mtd_set_ooblayout(mtd, nfc->oob_layout); return 0; } @@ -345,11 +346,47 @@ static int jz4780_nand_init_chips(struct jz4780_nand_controller *nfc, return 0; } +static int jz4725b_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct nand_ecc_ctrl *ecc = &chip->ecc; + + if (section || !ecc->total) + return -ERANGE; + + oobregion->length = ecc->total; + oobregion->offset = 3; + + return 0; +} + +static int jz4725b_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct nand_ecc_ctrl *ecc = &chip->ecc; + + if (section) + return -ERANGE; + + oobregion->length = mtd->oobsize - ecc->total - 3; + oobregion->offset = 3 + ecc->total; + + return 0; +} + +const struct mtd_ooblayout_ops jz4725b_ooblayout_ops = { + .ecc = jz4725b_ooblayout_ecc, + .free = jz4725b_ooblayout_free, +}; + static int jz4780_nand_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; unsigned int num_banks; struct jz4780_nand_controller *nfc; + const char *layout; int ret; num_banks = jz4780_nemc_num_banks(dev); @@ -366,6 +403,18 @@ static int jz4780_nand_probe(struct platform_device *pdev) if (!nfc->soc_info) return -EINVAL; + nfc->oob_layout = &nand_ooblayout_lp_ops; + + ret = device_property_read_string(dev, "ingenic,oob-layout", &layout); + if (!ret) { + if (!strcmp(layout, "ingenic,jz4725b")) { + nfc->oob_layout = &jz4725b_ooblayout_ops; + } else { + dev_err(dev, "Unrecognized OOB layout %s\n", layout); + return -EINVAL; + } + } + /* * Check for BCH HW before we call nand_scan_ident, to prevent us from * having to call it again if the BCH driver returns -EPROBE_DEFER. -- 2.20.1