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[209.132.180.67]) by mx.google.com with ESMTP id g3si175970pgi.443.2019.02.04.06.47.34; Mon, 04 Feb 2019 06:47:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=W9wcUqx1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728502AbfBDOhV (ORCPT + 99 others); Mon, 4 Feb 2019 09:37:21 -0500 Received: from mail.kernel.org ([198.145.29.99]:42278 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727626AbfBDOhU (ORCPT ); Mon, 4 Feb 2019 09:37:20 -0500 Received: from bbrezillon (unknown [91.160.177.164]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D45D02083B; Mon, 4 Feb 2019 14:37:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1549291040; bh=AvnNVAT8ciem9UZ+hOBYnQRHq5c1WtwKWaoN/SqJE1o=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=W9wcUqx16D0Z44oXAovv0qLuy8bpGQs+aMSlqCZXzffcFJmKWlBUjK5ogbIGVwKg0 g8MtQN46FSizXq4NUpNzF3mDpNvCbEJ5oL1BBmN8yk98YCq+3AteWrUZbeP/yTS5H+ eigbPgDylxQsz8W2VCwWZwQMPKiLCAZhXxajmkmg= Date: Mon, 4 Feb 2019 15:37:13 +0100 From: Boris Brezillon To: Cc: , , , , , , , , , , , , Subject: Re: [PATCH v4 13/13] spi: atmel-quadspi: add support for sam9x60 qspi controller Message-ID: <20190204153713.2fd02769@bbrezillon> In-Reply-To: <25f6ee72-e6e1-7014-6e4b-abe0a1a0eebc@microchip.com> References: <20190204100910.26701-1-tudor.ambarus@microchip.com> <20190204100910.26701-14-tudor.ambarus@microchip.com> <20190204151643.0354180d@bbrezillon> <25f6ee72-e6e1-7014-6e4b-abe0a1a0eebc@microchip.com> X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 4 Feb 2019 14:28:27 +0000 wrote: > > > >> + writel_relaxed(cfg->ifr, aq->regs + QSPI_IFR); > >> +} > > > > Hm, so the only difference we have is the RICR vs ICR reg and the > > APBTFRTYP_READ vs SAMA5D2_WRITE_TRSFR bit. Not sure it deserves > > creating 2 hooks for that. Can we have something like ->has_ricr in > > the caps and then have an if/else block directly in > > atmel_qspi_set_cfg()? > > > > Correct. It is a cost of an extra if, I tried to avoid it. I like it better with > these two hooks, but if you have a strong opinion I'll do it, just confirm it again. The cost of an indirect call is actually higher than an extra if/else block. I'm not against paying this extra cost when implementations are completely different, but that does not seem to be the case here. Moreover, if you get rid of these hooks, you can also get rid of the cfg struct.