Received: by 2002:ac0:8c9a:0:0:0:0:0 with SMTP id r26csp4046961ima; Mon, 4 Feb 2019 09:19:11 -0800 (PST) X-Google-Smtp-Source: AHgI3IaSPgCq1NfwGKip8SN/XJBpCtqSorvrTvx40trsDHJ4Apid5y/96mpayBDkbjVF0m//br2N X-Received: by 2002:a62:9111:: with SMTP id l17mr431509pfe.200.1549300751013; Mon, 04 Feb 2019 09:19:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549300751; cv=none; d=google.com; s=arc-20160816; b=HyrVitcA8JqltQwLJybh8TMvFS657osC4oDAhGwRxXEEsGBaU/e9eSg7XL0yy4eh9w O9SBrEeJnnaq5JuHqqN4KXt5es3oYBe7LFc46w2XTok5J5Bc5ixG5Y7Ebd/Gs7EXveiX 2qrTH5NV/+tVr85hFZ9h8MFJUrCzYJJ3aOJUzMrVhhq6gvO28Y2mcvsCz8Cknhunoq4i VudFTpbJrZkrvhAlPyCzjApTXpxZNiNQw9CKG3saIWitfQ3gv5onXtur0Eukc2qTyNMf MVLtq2iM3AOsNHDDL0jYkGn856r8PZUoI7D7t1lJ8cmgFK5cniBHHUgHWGBTrrXOzJVf rZ4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dmarc-filter:dkim-signature:dkim-signature; bh=TLCPchfdniUhbIbDr92fQRnvt/IVc0ut8uog5xndNKo=; b=Y3A/7fNOIrRc4nTfJAhJiv4DAM6onQmLrNmaSOi2FYhgE6qz0NxvnOrSJ4+MQmxz2E i/aonK0md2fPJif13BQtxZWfiXnloHNXIwtWuyBP8qf6g7svYf7g+yKUpgOzpnAsDHwg UIqxfEVE6TAFlRModrA1r8Uy6I4b3GPHgVUsgGK/UIGrNHevqZOJpfTXyTyXWZ+o+tgr Y9kc99VC3+qHBVWYDl5UdlEYoli7BhW/QE5TO1eRw7txwnwmrISbPSDQhcHEDezdWR+L 7erkaf66aRrinUgD0Oth59IHoFpvPR8BHH+Kyabt1UukP4XuOl+aWq2XgzeAeMp+CHSL 1ZBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=LqVJrLdm; dkim=pass header.i=@codeaurora.org header.s=default header.b=LqVJrLdm; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n184si541485pgn.95.2019.02.04.09.18.54; Mon, 04 Feb 2019 09:19:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=LqVJrLdm; dkim=pass header.i=@codeaurora.org header.s=default header.b=LqVJrLdm; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731719AbfBDQP5 (ORCPT + 99 others); Mon, 4 Feb 2019 11:15:57 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:49676 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731142AbfBDQPy (ORCPT ); Mon, 4 Feb 2019 11:15:54 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 7A78160989; Mon, 4 Feb 2019 16:15:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1549296953; bh=vSlgeuTJ23KCkhROMEb+w831WwNffRz4kmTKqBSB3j8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LqVJrLdmMiqc58R8jggyoTNKZBeQwmskq+DDr0gLXBz79ur2eJDjCDi4kwBvjQ0Qz o7xz54Fm5svss6WJi2fLvOu3D2ZW+mXzCkS1+pzVy9gHwCnY+6hNpCQcZDffj0HX9K jsjCBQs02MJEzKtAN+JNT0oYRrdFV/4IstXic67c= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID,DKIM_SIGNED autolearn=no autolearn_force=no version=3.4.0 Received: from jcrouse1-lnx.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jcrouse@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3A9B360918; Mon, 4 Feb 2019 16:15:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1549296953; bh=vSlgeuTJ23KCkhROMEb+w831WwNffRz4kmTKqBSB3j8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LqVJrLdmMiqc58R8jggyoTNKZBeQwmskq+DDr0gLXBz79ur2eJDjCDi4kwBvjQ0Qz o7xz54Fm5svss6WJi2fLvOu3D2ZW+mXzCkS1+pzVy9gHwCnY+6hNpCQcZDffj0HX9K jsjCBQs02MJEzKtAN+JNT0oYRrdFV/4IstXic67c= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3A9B360918 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jcrouse@codeaurora.org From: Jordan Crouse To: freedreno@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , Rob Clark , David Airlie , Mark Rutland , Daniel Vetter Subject: [PATCH v1 2/6] dt-bindings: drm/msm/a6xx: Add GX power-domain for GMU bindings Date: Mon, 4 Feb 2019 09:15:40 -0700 Message-Id: <1549296944-17285-3-git-send-email-jcrouse@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1549296944-17285-1-git-send-email-jcrouse@codeaurora.org> References: <1549296944-17285-1-git-send-email-jcrouse@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The GMU should have two power domains defined: "cx" and "gx". "cx" is the actual power domain for the device and "gx" will be attached at runtime to manage reference counting on the GPU device in case of a GMU crash. Signed-off-by: Jordan Crouse --- Documentation/devicetree/bindings/display/msm/gmu.txt | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/gmu.txt b/Documentation/devicetree/bindings/display/msm/gmu.txt index 3439b38..90af5b0 100644 --- a/Documentation/devicetree/bindings/display/msm/gmu.txt +++ b/Documentation/devicetree/bindings/display/msm/gmu.txt @@ -24,7 +24,10 @@ Required properties: * "cxo" * "axi" * "mnoc" -- power-domains: should be <&clock_gpucc GPU_CX_GDSC> +- power-domains: should be: + <&clock_gpucc GPU_CX_GDSC> + <&clock_gpucc GPU_GX_GDSC> +- power-domain-names: Matching names for the power domains - iommus: phandle to the adreno iommu - operating-points-v2: phandle to the OPP operating points @@ -51,7 +54,10 @@ Example: <&gcc GCC_GPU_MEMNOC_GFX_CLK>; clock-names = "gmu", "cxo", "axi", "memnoc"; - power-domains = <&gpucc GPU_CX_GDSC>; + power-domains = <&gpucc GPU_CX_GDSC>, + <&gpucc GPU_GX_GDSC>; + power-domain-names = "cx", "gx"; + iommus = <&adreno_smmu 5>; operating-points-v2 = <&gmu_opp_table>; -- 2.7.4