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[90.86.125.223]) by smtp.gmail.com with ESMTPSA id q9sm11197506wrv.26.2019.02.04.09.18.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Feb 2019 09:18:15 -0800 (PST) From: Bartosz Golaszewski To: Sekhar Nori , Kevin Hilman , Daniel Lezcano , Rob Herring , Mark Rutland , Thomas Gleixner Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v2 08/12] ARM: davinci: dm355: switch to using the clocksource driver Date: Mon, 4 Feb 2019 18:17:53 +0100 Message-Id: <20190204171757.32073-9-brgl@bgdev.pl> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190204171757.32073-1-brgl@bgdev.pl> References: <20190204171757.32073-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bartosz Golaszewski We now have a proper clocksource driver for davinci. Switch the platform to using it. Signed-off-by: Bartosz Golaszewski --- arch/arm/mach-davinci/dm355.c | 36 ++++++++++++++++++++++------------- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 2a523fa7c716..287cddaec67c 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -29,7 +29,8 @@ #include #include #include -#include + +#include #include "asp.h" #include "davinci.h" @@ -617,16 +618,24 @@ static struct davinci_id dm355_ids[] = { }, }; -/* - * T0_BOT: Timer 0, bottom: clockevent source for hrtimers - * T0_TOP: Timer 0, top : clocksource for generic timekeeping - * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code) - * T1_TOP: Timer 1, top : - */ -static struct davinci_timer_info dm355_timer_info = { - .timers = davinci_timer_instance, - .clockevent_id = T0_BOT, - .clocksource_id = T0_TOP, +static const struct davinci_timer_cfg dm355_timer_cfg = { + .reg = { + .start = DAVINCI_TIMER0_BASE, + .end = DAVINCI_TIMER0_BASE + SZ_4K, + .flags = IORESOURCE_MEM, + }, + .irq = { + { + .start = IRQ_TINT0_TINT12, + .end = IRQ_TINT0_TINT12, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_TINT0_TINT34, + .end = IRQ_TINT0_TINT34, + .flags = IORESOURCE_IRQ, + } + } }; static struct plat_serial8250_port dm355_serial0_platform_data[] = { @@ -708,7 +717,6 @@ static const struct davinci_soc_info davinci_soc_info_dm355 = { .intc_type = DAVINCI_INTC_TYPE_AINTC, .intc_irq_prios = dm355_default_priorities, .intc_irq_num = DAVINCI_N_AINTC_IRQ, - .timer_info = &dm355_timer_info, .sram_dma = 0x00010000, .sram_len = SZ_32K, }; @@ -735,6 +743,7 @@ void __init dm355_init_time(void) { void __iomem *pll1, *psc; struct clk *clk; + int rv; clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM355_REF_FREQ); @@ -750,7 +759,8 @@ void __init dm355_init_time(void) return; } - davinci_timer_init(clk); + rv = davinci_timer_register(clk, &dm355_timer_cfg); + WARN(rv, "Unable to register the timer: %d\n", rv); } static struct resource dm355_pll2_resources[] = { -- 2.20.1