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[209.132.180.67]) by mx.google.com with ESMTP id 13si5576664pld.398.2019.02.06.01.34.17; Wed, 06 Feb 2019 01:34:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728492AbfBFJ2A (ORCPT + 99 others); Wed, 6 Feb 2019 04:28:00 -0500 Received: from metis.ext.pengutronix.de ([85.220.165.71]:40517 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725897AbfBFJ17 (ORCPT ); Wed, 6 Feb 2019 04:27:59 -0500 Received: from kresse.hi.pengutronix.de ([2001:67c:670:100:1d::2a]) by metis.ext.pengutronix.de with esmtp (Exim 4.89) (envelope-from ) id 1grJUq-0007kz-5c; Wed, 06 Feb 2019 10:27:56 +0100 Message-ID: <1549445274.2544.57.camel@pengutronix.de> Subject: Re: [PATCH RESEND] PCI: Check for USB xHCI class for HAPS platform From: Lucas Stach To: Bjorn Helgaas , Thinh Nguyen Cc: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, "Lukas F. Hartmann" , Trent Piepho , John Youn , Richard Zhu Date: Wed, 06 Feb 2019 10:27:54 +0100 In-Reply-To: <20190205233159.GC7268@google.com> References: <20190205233159.GC7268@google.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.6-1+deb9u1 Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::2a X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Bjorn, Am Dienstag, den 05.02.2019, 17:31 -0600 schrieb Bjorn Helgaas: > [+cc Richard, Lucas] > > On Tue, Feb 05, 2019 at 01:04:28PM -0800, Thinh Nguyen wrote: > > The Synopsys HAPS USB controller has a VID PID (16c3,abcd) that > > matches > > to an existing PCIe controller. This quirk is intended for USB HAPS > > devices only. To fix this, check for the PCI class USB xHCI to > > prevent > > matching the PCIe controllers. > > So there are at least three different parts with the same Vendor & > Device ID ([16c3:abcd]): > >   1) Synopsys HAPS USB3 controller >   2) Synopsys PCIe IP in the NXP i.MX6QP (reported by Lukas) The first incorporation of this IP in a Freescale SoC (i.MX6Q) also uses the device ID 0xabcd. So this seems to be a major miscommunication between NXP/Freescale and Synopsys. Regards, Lucas >   3) Synopsys PCIe IP in the NXP i.MX7D (reported by Trent) > > I don't know if Synopsys is to blame for 2 & 3, or if NXP was > expected > to change the Vendor ID when incorporating the Synopsys IP into the > i.MX designs.  But even leaving the default Device ID of the PCIe IP > the same as another Synopsys device was probably a bad idea. > > dwc3-haps claims by Vendor & Device ID; it doesn't look at the Class > Code.  What happens when it tries to claim the PCIe IP in i.MX? > > lspci also doesn't look at the Class Code when it looks up the text > name of devices, so it will print the same name for both.  Of course, > the Linux PCI ID database at https://pci-ids.ucw.cz/read/PC/16c3 > shows > basically no information for the 0x16c3 Vendor ID, so it won't print > anything useful no matter what.  You could add some things there :) > > > Fixes: 03e6742584af ("PCI: Override Synopsys USB 3.x HAPS device > > class") > > Signed-off-by: Thinh Nguyen > > --- > >  drivers/pci/quirks.c | 5 +++-- > >  1 file changed, 3 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > > index b0a413f3f7ca..e2a879e93d86 100644 > > --- a/drivers/pci/quirks.c > > +++ b/drivers/pci/quirks.c > > @@ -639,8 +639,9 @@ static void quirk_synopsys_haps(struct pci_dev > > *pdev) > >   break; > >   } > >  } > > -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SYNOPSYS, PCI_ANY_ID, > > -  quirk_synopsys_haps); > > +DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_SYNOPSYS, PCI_ANY_ID, > > +        PCI_CLASS_SERIAL_USB_XHCI, 0, > > +        quirk_synopsys_haps); > >   > >  /* > >   * Let's make the southbridge information explicit instead of > > having to > > --  > > 2.11.0 > >