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[209.132.180.67]) by mx.google.com with ESMTP id h8si8454659pgc.397.2019.02.07.06.16.49; Thu, 07 Feb 2019 06:17:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@lunn.ch header.s=20171124 header.b=cuVlkzRy; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726994AbfBGOPn (ORCPT + 99 others); Thu, 7 Feb 2019 09:15:43 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:42478 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726558AbfBGOPn (ORCPT ); Thu, 7 Feb 2019 09:15:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=i8wpvOeWaWs47XPtdzw6kdYnPH8LLtVL8HntV08+VZA=; b=cuVlkzRyzb1PgRMsfyLuC+xaSH lWEBYOnqC1e16FDYGRULhhu0dTDcLWfJ0uwrsXTAQ7DHE/VETwLZw3WnUwfuKcmcciKrsvZ+HywX0 kYmgP06pJ05UOigIJ4AzwMU+raERdiHBX/SU6ZIhKWBMWQqE6KmZXO0TS7J+FLO9Po5E=; Received: from andrew by vps0.lunn.ch with local (Exim 4.89) (envelope-from ) id 1grkSp-000728-4R; Thu, 07 Feb 2019 15:15:39 +0100 Date: Thu, 7 Feb 2019 15:15:39 +0100 From: Andrew Lunn To: Maxime Chevallier Cc: davem@davemloft.net, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Florian Fainelli , Heiner Kallweit , Russell King , linux-arm-kernel@lists.infradead.org, Antoine Tenart , thomas.petazzoni@bootlin.com, gregory.clement@bootlin.com, miquel.raynal@bootlin.com, nadavh@marvell.com, stefanc@marvell.com, mw@semihalf.com Subject: Re: [PATCH net-next v2 07/10] net: phy: marvell10g: Add support for 2.5GBASET Message-ID: <20190207141539.GJ32483@lunn.ch> References: <20190207094939.27369-1-maxime.chevallier@bootlin.com> <20190207094939.27369-8-maxime.chevallier@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190207094939.27369-8-maxime.chevallier@bootlin.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > if (phydev->speed == SPEED_10000) > phydev->interface = PHY_INTERFACE_MODE_10GKR; > + else if (phydev->speed == SPEED_2500) > + phydev->interface = PHY_INTERFACE_MODE_2500BASEX; > else if (phydev->speed >= SPEED_10 && > - phydev->speed < SPEED_10000) > + phydev->speed < SPEED_2500) > phydev->interface = PHY_INTERFACE_MODE_SGMII; > } Maybe swap to a switch statement? > static struct phy_driver mv3310_drivers[] = { > { > - .phy_id = 0x002b09aa, > + .phy_id = MARVELL_PHY_ID_88X3310, What does the datasheet say about the lower nibble? Often it is a silicon revision field, so you don't match on it. But 0xa is a rather odd revision. Thanks Andrew