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[209.132.180.67]) by mx.google.com with ESMTP id p31si2084841pgb.440.2019.02.08.04.30.16; Fri, 08 Feb 2019 04:30:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@mobiveil.co.in header.s=google header.b=GrBWxcGh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727551AbfBHM33 (ORCPT + 99 others); Fri, 8 Feb 2019 07:29:29 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:40934 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727309AbfBHM33 (ORCPT ); Fri, 8 Feb 2019 07:29:29 -0500 Received: by mail-wm1-f65.google.com with SMTP id q21so3190801wmc.5 for ; Fri, 08 Feb 2019 04:29:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mobiveil.co.in; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=AwlcFdNjaArFQK8VuUiv2qmrcfV52Mv3VLSBRqH+Mus=; b=GrBWxcGh8ewr9dq1wYM7qRBn63epekM+GjcGLDYwXEbTlOjwPFJazeRfwVyLG/sopM +eZQ7SWw3mK2z6KPrgHLQ6RWDbrM+GEfNCGwdXGDd79pjp5eyz172VUGcuDKqkUhRcuG UuTtXCK+XP1fW+VlrUY8GD3kAQf3TWvzk5eJM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=AwlcFdNjaArFQK8VuUiv2qmrcfV52Mv3VLSBRqH+Mus=; b=DKV9H7vjNq1uSpMKhlWpCrWlK1tYIGFm6VEIJ+5XrSNCsP2jL3K9JdnU4WNAkRtVQk DQ0d8A7FstvvcjojSU6w9brk3W9YdCIndcWJ+kHwMfLr1+nQqI1jHGr9ixBjdGmGNU7c 0WvV3J192ZVM7mDI+WXJsIbvxf3bkI0veU6GF42G/7YrClY9tjA0DsBidQbuyGrqq22O kSOYjDHIOUHO+vyxTapNmAQlPV+6TjjGkeaqrBzd59W+Xj3vIAG36uuJ3wuk6Ef05cRw afgiwK8wsxValkboOytD7/WhP6RJveikYAWlaujTnozZu8AcE54oDgOYHAlLVQHtwnW4 nmGg== X-Gm-Message-State: AHQUAuZWBQn11ILRm8sAKy68OF3kClNptYMHR6DgwTqJjlMScfTiaCVt aELWFP+gmRSQMJeE9EPTrK3EZ8mD+PcM5PxK+snprg== X-Received: by 2002:a7b:c5d1:: with SMTP id n17mr11517169wmk.152.1549628966680; Fri, 08 Feb 2019 04:29:26 -0800 (PST) MIME-Version: 1.0 References: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com> <20190129080926.36773-16-Zhiqiang.Hou@nxp.com> In-Reply-To: <20190129080926.36773-16-Zhiqiang.Hou@nxp.com> From: Subrahmanya Lingappa Date: Fri, 8 Feb 2019 18:02:05 +0530 Message-ID: Subject: Re: [PATCHv3 15/27] dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional To: "Z.q. Hou" Cc: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" , "catalin.marinas@arm.com" , "will.deacon@arm.com" , Mingkai Hu , "M.h. Lian" , Xiaowei Bao Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jan 29, 2019 at 1:40 PM Z.q. Hou wrote: > > From: Hou Zhiqiang > > Change the "gpio_slave" and "apb_csr" to optional, the "gpio_slave" > is not used in current code, and "apb_csr" is not used by some > platforms. > > Signed-off-by: Hou Zhiqiang > Acked-by: Subrahmanya Lingappa > Acked-by: Rob Herring > Reviewed-by: Minghuan Lian > --- > V3: > - No change > > Documentation/devicetree/bindings/pci/mobiveil-pcie.txt | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > index a618d4787dd7..64156993e052 100644 > --- a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt > @@ -10,8 +10,10 @@ Required properties: > interrupt source. The value must be 1. > - compatible: Should contain "mbvl,gpex40-pcie" > - reg: Should contain PCIe registers location and length > + Mandatory: > "config_axi_slave": PCIe controller registers > "csr_axi_slave" : Bridge config registers > + Optional: > "gpio_slave" : GPIO registers to control slot power > "apb_csr" : MSI registers > > -- > 2.17.1 > Reviewed-by: Subrahmanya Lingappa