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Date:   Fri, 8 Feb 2019 09:00:07 -0700
From:   Nathan Chancellor <natechancellor@gmail.com>
To:     Julien Thierry <julien.thierry@arm.com>
Cc:     linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        daniel.thompson@linaro.org, joel@joelfernandes.org,
        marc.zyngier@arm.com, christoffer.dall@arm.com,
        james.morse@arm.com, catalin.marinas@arm.com, will.deacon@arm.com,
        mark.rutland@arm.com, Ard Biesheuvel <ard.biesheuvel@linaro.org>,
        Oleg Nesterov <oleg@redhat.com>,
        Nick Desaulniers <ndesaulniers@google.com>
Subject: Re: [PATCH v10 12/25] arm64: irqflags: Use ICC_PMR_EL1 for interrupt
 masking
Message-ID: <20190208160007.GA26005@archlinux-ryzen>
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 <20190208043543.GA5040@archlinux-ryzen>
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On Fri, Feb 08, 2019 at 09:36:48AM +0000, Julien Thierry wrote:
> Hi Nathan,
> 
> On 08/02/2019 04:35, Nathan Chancellor wrote:
> > On Thu, Jan 31, 2019 at 02:58:50PM +0000, Julien Thierry wrote:
> 
> [...]
> 
> > 
> > Hi Julien,
> > 
> > This patch introduced a slew of Clang warnings:
> > 
> > In file included from arch/arm64/kernel/signal.c:21:
> > In file included from include/linux/compat.h:10:
> > In file included from include/linux/time.h:6:
> > In file included from include/linux/seqlock.h:36:
> > In file included from include/linux/spinlock.h:54:
> > In file included from include/linux/irqflags.h:16:
> > arch/arm64/include/asm/irqflags.h:50:10: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths]
> >                 : "r" (GIC_PRIO_IRQON)
> >                        ^
> > arch/arm64/include/asm/ptrace.h:39:25: note: expanded from macro 'GIC_PRIO_IRQON'
> > #define GIC_PRIO_IRQON          0xf0
> >                                 ^
> > arch/arm64/include/asm/irqflags.h:46:44: note: use constraint modifier "w"
> >                 "msr_s  " __stringify(SYS_ICC_PMR_EL1) ",%0\n"
> >                                                          ^~
> >                                                          %w0
> 
> I'm not sure I get the relevance of this kind of warnings from Clang.
> Had it been an output operand I could understand the concern of having a
> variable too small to store the register value. But here it's an input
> operand being place in a wider register...
> 
> > arch/arm64/include/asm/alternative.h:286:29: note: expanded from macro 'ALTERNATIVE'
> >         _ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
> >                                    ^
> > arch/arm64/include/asm/alternative.h:88:30: note: expanded from macro '_ALTERNATIVE_CFG'
> >         __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg), 0)
> >                                     ^
> > arch/arm64/include/asm/alternative.h:76:2: note: expanded from macro '__ALTERNATIVE_CFG'
> >         newinstr "\n"                                                   \
> >         ^
> > In file included from arch/arm64/kernel/signal.c:21:
> > In file included from include/linux/compat.h:10:
> > In file included from include/linux/time.h:6:
> > In file included from include/linux/seqlock.h:36:
> > In file included from include/linux/spinlock.h:54:
> > In file included from include/linux/irqflags.h:16:
> > arch/arm64/include/asm/irqflags.h:61:10: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths]
> >                 : "r" (GIC_PRIO_IRQOFF)
> >                        ^
> > arch/arm64/include/asm/ptrace.h:40:26: note: expanded from macro 'GIC_PRIO_IRQOFF'
> > #define GIC_PRIO_IRQOFF         (GIC_PRIO_IRQON & ~0x80)
> >                                 ^
> > arch/arm64/include/asm/irqflags.h:58:45: note: use constraint modifier "w"
> >                 "msr_s  " __stringify(SYS_ICC_PMR_EL1) ", %0",
> >                                                           ^
> > arch/arm64/include/asm/irqflags.h:94:10: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths]
> >                 : "r" (GIC_PRIO_IRQOFF)
> >                        ^
> > arch/arm64/include/asm/ptrace.h:40:26: note: expanded from macro 'GIC_PRIO_IRQOFF'
> > #define GIC_PRIO_IRQOFF         (GIC_PRIO_IRQON & ~0x80)
> >                                 ^
> > arch/arm64/include/asm/irqflags.h:91:18: note: use constraint modifier "w"
> >                         "csel   %0, %0, %2, eq",
> >                                         ^~
> >                                         %w2
> > arch/arm64/include/asm/alternative.h:286:29: note: expanded from macro 'ALTERNATIVE'
> >         _ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
> >                                    ^
> > arch/arm64/include/asm/alternative.h:88:30: note: expanded from macro '_ALTERNATIVE_CFG'
> >         __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg), 0)
> >                                     ^
> > arch/arm64/include/asm/alternative.h:76:2: note: expanded from macro '__ALTERNATIVE_CFG'
> >         newinstr "\n"                                                   \
> >         ^
> > 3 warnings generated.
> > 
> > 
> > I am not sure if they should be fixed with Clang's suggestion of a
> > constraint modifier or a cast like commit 1b57ec8c7527 ("arm64: io:
> > Ensure value passed to __iormb() is held in a 64-bit register"), hence
> > this message.
> > 
> 
> Clang's suggestion would not work as MSR instructions do not operate on
> 32-bit general purpose registers. Seeing that PMR is a 32-bit register,
> I'd avoid adding UL for the GIC_PRIO_IRQ* constants.
> 
> So I'd recommend just casting the the asm inline operands to unsigned
> long. This should only affect the 3 locations
> arch/arm64/include/asm/irqflags.h.
> 
> Does the following patch work for you?

Hi Julien,

Yes it does, thank you for the quick response and fix!

Nathan

> 
> Thanks,
> 
> -- 
> Julien Thierry
> 
> 
> -->
> 
> From e839dec632bbf440efe8314751138ba46324078c Mon Sep 17 00:00:00 2001
> From: Julien Thierry <julien.thierry@arm.com>
> Date: Fri, 8 Feb 2019 09:21:58 +0000
> Subject: [PATCH] arm64: irqflags: Fix clang build warnings
> 
> Clang complains when passing asm operands that are smaller than the
> registers they are mapped to:
> 
> arch/arm64/include/asm/irqflags.h:50:10: warning: value size does not
> 	match register size specified by the constraint and modifier
> 	[-Wasm-operand-widths]
>                 : "r" (GIC_PRIO_IRQON)
> 
> Fix it by casting the affected input operands to a type of the correct
> size.
> 
> Reported-by: Nathan Chancellor <natechancellor@gmail.com>
> Signed-off-by: Julien Thierry <julien.thierry@arm.com>

Tested-by: Nathan Chancellor <natechancellor@gmail.com>

> ---
>  arch/arm64/include/asm/irqflags.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h
> index d4597b2..43d8366 100644
> --- a/arch/arm64/include/asm/irqflags.h
> +++ b/arch/arm64/include/asm/irqflags.h
> @@ -47,7 +47,7 @@ static inline void arch_local_irq_enable(void)
>  		"dsb	sy",
>  		ARM64_HAS_IRQ_PRIO_MASKING)
>  		:
> -		: "r" (GIC_PRIO_IRQON)
> +		: "r" ((unsigned long) GIC_PRIO_IRQON)
>  		: "memory");
>  }
>  
> @@ -58,7 +58,7 @@ static inline void arch_local_irq_disable(void)
>  		"msr_s  " __stringify(SYS_ICC_PMR_EL1) ", %0",
>  		ARM64_HAS_IRQ_PRIO_MASKING)
>  		:
> -		: "r" (GIC_PRIO_IRQOFF)
> +		: "r" ((unsigned long) GIC_PRIO_IRQOFF)
>  		: "memory");
>  }
>  
> @@ -91,7 +91,7 @@ static inline unsigned long arch_local_save_flags(void)
>  			"csel	%0, %0, %2, eq",
>  			ARM64_HAS_IRQ_PRIO_MASKING)
>  		: "=&r" (flags), "+r" (daif_bits)
> -		: "r" (GIC_PRIO_IRQOFF)
> +		: "r" ((unsigned long) GIC_PRIO_IRQOFF)
>  		: "memory");
>  
>  	return flags;
> -- 
> 1.9.1
> 
>