Received: by 2002:ac0:946b:0:0:0:0:0 with SMTP id j40csp399516imj; Fri, 8 Feb 2019 23:40:03 -0800 (PST) X-Google-Smtp-Source: AHgI3IZz9Zc/BewTru6QStCpFgPUZE0PNDA8tSBo38ms017SAws7A7/HUrmDFaK0BPRqYl49s8ud X-Received: by 2002:a65:6116:: with SMTP id z22mr24195634pgu.265.1549698003246; Fri, 08 Feb 2019 23:40:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549698003; cv=none; d=google.com; s=arc-20160816; b=f47fh+0Va795TNj9aPtGg2x2SDpmj5Fgm/Aa4BqE3k3Axu3SUHNwlPjWL1qzCIu0La cUT2uSVdToj5bkUzR3U7dI1g3hnSI8ugpRe6Z0+i+LCfxsfgnKH9AAsZuCAbI5foUS+4 CnH2Yj19kzZTtibBJoZhPXOwMiwUFmSauSJ+yfhdoajH1mgScxGJFzLWfdlonNWQIFaO IVQ+wAuqq71F8hYeebmzUF5efgl2Lb4WK9DkARPSI+Fm5TC+Kg+FNWVzhACDLwh1Dyo2 J8O3AqwfjUQGRs8IJGi7hcqmV0vFBoc6pUgH2TsifsTTq2cOmev6+TdY+n0KHB32HZjQ y7sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:date:cc:to:from:subject:message-id; bh=J+zJiXgFvWiMSKaB65d5tTMVu4+ROlq1uL5NNdfmRHs=; b=PiRo+vT9dozr45IIXBx0PP/QfDZ+rmmtkSFygcYkBs/0d+F0Ybl6hwjVcaJFv4sA35 OQySLx7vipHXkJuncPwLf4OOZhwfJMDLZd/G/6jUFG9Rk/w8u6Yr25lAyT0n7XQk06b0 P5Drarp+velpiwxelnOCd9KMOeeCC4ahev19D6KMasLW721mpAdBO1ID7rYbNpcMefUz grIIQux/P1h0SvlpPR1XOiRGoQNIthLrdHx/f3N2QeJYyL9H2dYxBI61pYsbaArIUU1v VwhufGWWzKvM65bhTOOQUAf5+unVkLbQ9tbkPYnHnsmKnzq/aInPiJiHvcMyPt0hyKR7 7sOA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n78si4624926pfi.235.2019.02.08.23.39.08; Fri, 08 Feb 2019 23:40:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726747AbfBIHhr (ORCPT + 99 others); Sat, 9 Feb 2019 02:37:47 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:20598 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725933AbfBIHhr (ORCPT ); Sat, 9 Feb 2019 02:37:47 -0500 X-UUID: d59b8154488342f88233e1a319356576-20190209 X-UUID: d59b8154488342f88233e1a319356576-20190209 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1580361963; Sat, 09 Feb 2019 15:37:36 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sat, 9 Feb 2019 15:37:30 +0800 Received: from [172.21.77.4] (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sat, 9 Feb 2019 15:37:30 +0800 Message-ID: <1549697850.26316.5.camel@mtksdaap41> Subject: Re: [PATCH v6 6/6] arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile From: Erin Lo To: Matthias Brugger CC: Rob Herring , Mark Rutland , "Ben Ho" , Mars Cheng , "Mengqi Zhang" , linux-clk , Hsin-Hsiung Wang , Weiyi Lu , Seiya Wang , "open list:SERIAL DRIVERS" , Yingjoe Chen , , Jason Cooper , Marc Zyngier , "moderated list:ARM/Mediatek SoC support" , "Thomas Gleixner" , Eddie Huang , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , srv_heupstream , Greg Kroah-Hartman , Stephen Boyd , , Zhiyong Tao Date: Sat, 9 Feb 2019 15:37:30 +0800 In-Reply-To: References: <1548317240-44682-1-git-send-email-erin.lo@mediatek.com> <1548317240-44682-7-git-send-email-erin.lo@mediatek.com> <20190130162204.GA1521@bogus> <1548902050.23230.4.camel@mtksdaap41> <1548992018.11367.8.camel@mtksdaap41> <1548997866.26127.4.camel@mtksdaap41> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-SNTS-SMTP: 939D2B96DD7D2DE4EA4A1C9D639E39BAF78BA30F0AAFF96F170F61F9E407B9AD2000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 2019-02-07 at 16:08 +0100, Matthias Brugger wrote: > > On 01/02/2019 06:11, Erin Lo wrote: > > Add back more people since mail server issue > > > > On Fri, 2019-02-01 at 11:33 +0800, Erin Lo wrote: > >> On Thu, 2019-01-31 at 15:10 -0600, Rob Herring wrote: > >>> On Wed, Jan 30, 2019 at 8:34 PM Erin Lo wrote: > >>>> > >>>> On Wed, 2019-01-30 at 10:22 -0600, Rob Herring wrote: > >>>>> On Thu, Jan 24, 2019 at 04:07:20PM +0800, Erin Lo wrote: > >>>>>> From: Ben Ho > >>>>>> > >>>>>> Add basic chip support for Mediatek 8183, include > >>>>>> pinctrl file, uart node with correct uart clocks, pwrap device > >>>>>> > >>>>>> Add clock controller nodes, include topckgen, infracfg, > >>>>>> apmixedsys and subsystem. > >>>>>> > >>>>>> Signed-off-by: Ben Ho > >>>>>> Signed-off-by: Erin Lo > >>>>>> Signed-off-by: Seiya Wang > >>>>>> Signed-off-by: Zhiyong Tao > >>>>>> Signed-off-by: Weiyi Lu > >>>>>> Signed-off-by: Mengqi Zhang > >>>>>> Signed-off-by: Hsin-Hsiung Wang > >>>>>> Signed-off-by: Eddie Huang > >>>>>> --- > >>>>> > >>>>> > >>>>>> + sysirq: intpol-controller@c530a80 { > >>>>> > >>>>> interrupt-controller@... > >>>> > >>>> I will modify it in next version. > >>>>> > >>>>> > >>>>> Place all the MMIO peripherals under one or more simple-bus nodes. > >>>>> > >>>>> Rob > >>>>> > >>>> > >>>> Do you mean need to add simple-bus like this? > >>> > >>> Yes. > >> > >> We remove soc because Matthias suggested it in former MTK SoC maybe in > >> 2015 year. > >> > >> We will add it back by your comment. > >> > >> Thank you. > >> > >> Best Regards, > >> Erin > > > > Hi, Matthias, > > Do you have any comment here? > > Although I wasn't able to find it in the documentation my understanding is, that > all devices on-chip should be under soc "bus". > > I'm sorry if I created confusion with comments in the past. > > Regards, > Matthias > OK! we will add soc "bus" back in next version. Thank you for your comment. Best Regards, Erin > > Thanks > > > > Best Regards, > > Erin > >>> > >>>> > >>>> + soc: soc { > >>>> + #address-cells = <0x1>; > >>>> + #size-cells = <0x1>; > >>>> + ranges = <0 0 0 0xffffffff>; > >>>> + compatible = "simple-bus"; > >>>> > >>>> soc_data: soc_data@08000000 { > >>>> compatible = "mediatek,mt8183-efuse", > >>>> "mediatek,efuse"; > >>>> reg = <0 0x08000000 0 0x0010>; > >>>> #address-cells = <1>; > >>>> #size-cells = <1>; > >>>> status = "disabled"; > >>>> }; > >>>> > >>>> gic: interrupt-controller@0c000000 { > >>>> compatible = "arm,gic-v3"; > >>>> #interrupt-cells = <4>; > >>>> > >>>> Best Regards, > >>>> Erin > >>>> > >>>>> _______________________________________________ > >>>>> Linux-mediatek mailing list > >>>>> Linux-mediatek@lists.infradead.org > >>>>> http://lists.infradead.org/mailman/listinfo/linux-mediatek > >>>> > >>>> > >>>> > >>>> _______________________________________________ > >>>> linux-arm-kernel mailing list > >>>> linux-arm-kernel@lists.infradead.org > >>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > >> > > > > > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek