Received: by 2002:ac0:946b:0:0:0:0:0 with SMTP id j40csp2275306imj; Sun, 10 Feb 2019 23:18:15 -0800 (PST) X-Google-Smtp-Source: AHgI3IaYKeCvU7KQgbNAWnc8IQaPkAhN3WmKQogHjxsECk/rgw0mRV0Py/Z6i6WN3gxbh8QrRO4W X-Received: by 2002:a63:d413:: with SMTP id a19mr22281142pgh.199.1549869495109; Sun, 10 Feb 2019 23:18:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549869495; cv=none; d=google.com; s=arc-20160816; b=Vj7WVZQc10mcpGoM1cioOjXI5K0IItnCoscNYBBafMYatE0CMJraJVVC+RqqFo7QII NzXBl95h6v1WuVJqUXtMwxgY/anIvi8hbCkJPRVCYgALDlz+Fiql/vXzuqdeJzuC3B/a CFmZrEi3BmbjWKEnkpNo28tPf8nzeBSLxi/uQ+d0LUWqJyrR/PLW/KolTZUDr1Ia8Iqe NmKyfZnX/GZhsGMrNrOpHCFgiqbEaU+vzxyXP490/JKsvRnBM8h0zjtxaLkxpM0eJXTu 7jbsR9RpzGRYeA+4MI5rZT1zgb267whvvYcYkqloZ4LuWTf4LzqcnQgCI1IxR2jJ7otS zRGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from; bh=CIbGxdAbjwvSYim1R4xxCF0gqKLzpFpj86HkZHlLFi0=; b=NuR7KJ09qGinkKSqmgOIJXyAEZcG2MRtNlyT3rN5GTYAFqDoQfPBe8o5U0cC0scL3Z tVN79m8RmyVKQAx6/jemC1iNfofzCwREKkaziQm7ZDRU383jemN1jPsSP4+TCHXtooKB qkYwaScE+GStaMY9wu71uciIQIx/SQ6rpl3lWYK+HBH2iNmuDVk7/xzV4eF8DUxOQZn6 W5bb+cws+kwTdxkj7Y0BwU77c+fzFOSSVxWeRQZKbrnin83w6l7RAv0lerVbvw/giyH/ P2isLV52UFGU/EG2r4torf+qSSyfPIOs80eIm/nh7H0KPKjmvFwAPVB9+/xRZLQaF59K /EZg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p11si9330824plk.191.2019.02.10.23.17.59; Sun, 10 Feb 2019 23:18:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726847AbfBKHRt (ORCPT + 99 others); Mon, 11 Feb 2019 02:17:49 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:6979 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725939AbfBKHRt (ORCPT ); Mon, 11 Feb 2019 02:17:49 -0500 X-UUID: 4cec08e0d3684b06b5d7199326102a6a-20190211 X-UUID: 4cec08e0d3684b06b5d7199326102a6a-20190211 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 424569442; Mon, 11 Feb 2019 15:17:33 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 11 Feb 2019 15:17:32 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 11 Feb 2019 15:17:32 +0800 From: Seiya Wang To: Rob Herring , Mark Rutland , Matthias Brugger , Michael Turquette , Stephen Boyd CC: , , , , , Seiya Wang Subject: [PATCH v1 1/2] arm64: dts: mt8173: correct cpu type of cpu2 and cpu3 to cortex-a72 Date: Mon, 11 Feb 2019 15:15:54 +0800 Message-ID: <20190211071555.31430-1-seiya.wang@mediatek.com> X-Mailer: git-send-email 2.14.1 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The cpu type of cpu2 and cpu3 should be cortex-a72, not cortex-a57. Signed-off-by: Seiya Wang --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 44374c506a1c..99675c51577a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -178,12 +178,12 @@ cpu2: cpu@100 { device_type = "cpu"; - compatible = "arm,cortex-a57"; + compatible = "arm,cortex-a72"; reg = <0x100>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; #cooling-cells = <2>; - clocks = <&infracfg CLK_INFRA_CA57SEL>, + clocks = <&infracfg CLK_INFRA_CA72SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; operating-points-v2 = <&cluster1_opp>; @@ -191,12 +191,12 @@ cpu3: cpu@101 { device_type = "cpu"; - compatible = "arm,cortex-a57"; + compatible = "arm,cortex-a72"; reg = <0x101>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; #cooling-cells = <2>; - clocks = <&infracfg CLK_INFRA_CA57SEL>, + clocks = <&infracfg CLK_INFRA_CA72SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; operating-points-v2 = <&cluster1_opp>; -- 2.14.1