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[209.132.180.67]) by mx.google.com with ESMTP id 189si10504228pfd.142.2019.02.11.04.28.58; Mon, 11 Feb 2019 04:29:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=teA3Su0K; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727348AbfBKM0h (ORCPT + 99 others); Mon, 11 Feb 2019 07:26:37 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:45952 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727606AbfBKM0f (ORCPT ); Mon, 11 Feb 2019 07:26:35 -0500 Received: by mail-wr1-f66.google.com with SMTP id q15so4440822wro.12 for ; Mon, 11 Feb 2019 04:26:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=x8EpdU+NTm/X4LPjHfsGwt/Q2G9WVDhSfKVsB9gEBqM=; b=teA3Su0KltSPCMKBbo6HhFtqjPLr+UKf9v6R0b3uyxnT+yiIVvjRhPHl7QgUp6I71F +ZkPcz2QQqQBuhGBMa9ge7CHFPD0vO0Vgl6bYiDesUpLvGNZaXcXbUitoi1QwAq9i4VO 7mrAJuABhr5jKrCP10W4khK9ky8pQ9xHznTPnAFp20ewzQ4ON+6jnVZWMBxy+AMeoUcC webLzUTYjqpYdncQW3xiVe3Fp5PyOHoqGSk5Id8qf1pQjriCX/JW/6EsQEZ9AsRonLjd dE9+bdQmuSgAn3ovYTPIoyDSTun6saYz62wUmGYJfXx+8SuJAk55X6RbQQC+/Q3QchwV 8jIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=x8EpdU+NTm/X4LPjHfsGwt/Q2G9WVDhSfKVsB9gEBqM=; b=Jg8CXTPVDcnsQ2gT4Mc1tDPpmeJj5pxOMFIyCnRmxA1ZsLmVTdkfCbo3YpsWEeEj+p LWzvBG/CPgLf1MDPnYAxFZGeApGEigRv6wanZo9SWltU9IdgSCRBAW5wY33LUFf+ITsA ZXcOxG1QmkAJI7iXTFkTFIBJZukDbEzMVDMonQjlAWP/B0kTHcd7BkTg+9ELhGQzdbsA Ma2YZv8lQmaKYWpuO+5m13eo98VbWFXdvdvze4Gjv+gm8tBS3KyNfCErd4SyHvPvz1m5 dU+twllbD8/mta+sUtZ3NqE2AqqtBU0A1fSDo2BrJsk6QkztRGfKc9gLTlEHQ7/tvPpI 0VgQ== X-Gm-Message-State: AHQUAuasHy5eyBZoQ4cr12Y9GLzDP/OpZZ4av4ktj0+UsNxzCAn2p77T q8DCVq0dl7YRvozU7WOnLliplA== X-Received: by 2002:a5d:6086:: with SMTP id w6mr18683579wrt.308.1549887993231; Mon, 11 Feb 2019 04:26:33 -0800 (PST) Received: from debian-brgl.home ([2a01:cb1d:af:5b00:6d6c:8493:1ab5:dad7]) by smtp.gmail.com with ESMTPSA id l20sm19494321wrb.93.2019.02.11.04.26.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 11 Feb 2019 04:26:32 -0800 (PST) From: Bartosz Golaszewski To: Sekhar Nori , Kevin Hilman , Thomas Gleixner , Jason Cooper , Marc Zyngier , David Lechner Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [RESEND PATCH v2 16/33] ARM: davinci: aintc: use the new config structure Date: Mon, 11 Feb 2019 13:25:49 +0100 Message-Id: <20190211122606.8662-17-brgl@bgdev.pl> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190211122606.8662-1-brgl@bgdev.pl> References: <20190211122606.8662-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bartosz Golaszewski Modify the aintc driver to take all its configuration from the new config structure. Stop referencing davinci_soc_info in any way. Move the declaration for davinci_aintc_init() to irq-davinci-aintc.h and make it take the new config structure as parameter. Convert all users to the new version. Signed-off-by: Bartosz Golaszewski Reviewed-by: David Lechner --- arch/arm/mach-davinci/dm355.c | 2 +- arch/arm/mach-davinci/dm365.c | 2 +- arch/arm/mach-davinci/dm644x.c | 2 +- arch/arm/mach-davinci/dm646x.c | 2 +- arch/arm/mach-davinci/include/mach/common.h | 2 -- arch/arm/mach-davinci/irq.c | 39 +++++++++++---------- include/linux/irqchip/irq-davinci-aintc.h | 2 ++ 7 files changed, 26 insertions(+), 25 deletions(-) diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index ff79c1a17fae..c7cd765114af 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -805,7 +805,7 @@ static const struct davinci_aintc_config dm355_aintc_config = { void __init dm355_init_irq(void) { - davinci_aintc_init(); + davinci_aintc_init(&dm355_aintc_config); } static int __init dm355_init_devices(void) diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 44dc3ca94dd3..bde3c3b94cc9 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1064,7 +1064,7 @@ static const struct davinci_aintc_config dm365_aintc_config = { void __init dm365_init_irq(void) { - davinci_aintc_init(); + davinci_aintc_init(&dm365_aintc_config); } static int __init dm365_init_devices(void) diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 0b0ecac36486..6d3498058283 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -741,7 +741,7 @@ static const struct davinci_aintc_config dm644x_aintc_config = { void __init dm644x_init_irq(void) { - davinci_aintc_init(); + davinci_aintc_init(&dm644x_aintc_config); } void __init dm644x_init_devices(void) diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 4e871d00e4e9..a0a8b336c1a4 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -702,7 +702,7 @@ static const struct davinci_aintc_config dm646x_aintc_config = { void __init dm646x_init_irq(void) { - davinci_aintc_init(); + davinci_aintc_init(&dm646x_aintc_config); } static int __init dm646x_init_devices(void) diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 8c9c011f96f6..14e0e1c40611 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -24,8 +24,6 @@ void davinci_timer_init(struct clk *clk); -extern void davinci_aintc_init(void); - struct davinci_timer_instance { u32 base; u32 bottom_irq; diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c index 6a7205a844e1..f5578abfc0aa 100644 --- a/arch/arm/mach-davinci/irq.c +++ b/arch/arm/mach-davinci/irq.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include @@ -82,13 +83,14 @@ davinci_aintc_handle_irq(struct pt_regs *regs) } /* ARM Interrupt Controller Initialization */ -void __init davinci_aintc_init(void) +void __init davinci_aintc_init(const struct davinci_aintc_config *config) { - unsigned i, j; - const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios; + unsigned int irq_off, reg_off, prio, shift; int rv, irq_base; + const u8 *prios; - davinci_aintc_base = ioremap(davinci_soc_info.intc_base, SZ_4K); + davinci_aintc_base = ioremap(config->reg.start, + resource_size(&config->reg)); if (WARN_ON(!davinci_aintc_base)) return; @@ -114,23 +116,21 @@ void __init davinci_aintc_init(void) davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0); davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1); - for (i = DAVINCI_AINTC_IRQ_INTPRI0_REG; - i <= DAVINCI_AINTC_IRQ_INTPRI7_REG; i += 4) { - u32 pri; - - for (j = 0, pri = 0; j < 32; j += 4, davinci_def_priorities++) - pri |= (*davinci_def_priorities & 0x07) << j; - davinci_aintc_writel(pri, i); + prios = config->prios; + for (reg_off = DAVINCI_AINTC_IRQ_INTPRI0_REG; + reg_off <= DAVINCI_AINTC_IRQ_INTPRI7_REG; reg_off += 4) { + for (shift = 0, prio = 0; shift < 32; shift += 4, prios++) + prio |= (*prios & 0x07) << shift; + davinci_aintc_writel(prio, reg_off); } - irq_base = irq_alloc_descs(-1, 0, davinci_soc_info.intc_irq_num, 0); + irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0); if (WARN_ON(irq_base < 0)) return; davinci_aintc_irq_domain = irq_domain_add_legacy(NULL, - davinci_soc_info.intc_irq_num, - irq_base, 0, &irq_domain_simple_ops, - NULL); + config->num_irqs, irq_base, 0, + &irq_domain_simple_ops, NULL); if (WARN_ON(!davinci_aintc_irq_domain)) return; @@ -140,10 +140,11 @@ void __init davinci_aintc_init(void) if (WARN_ON(rv)) return; - for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num; - i += 32, j += 0x04) - davinci_aintc_setup_gc(davinci_aintc_base + j, - irq_base + i, 32); + for (irq_off = 0, reg_off = 0; + irq_off < config->num_irqs; + irq_off += 32, reg_off += 0x04) + davinci_aintc_setup_gc(davinci_aintc_base + reg_off, + irq_base + irq_off, 32); irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq); set_handle_irq(davinci_aintc_handle_irq); diff --git a/include/linux/irqchip/irq-davinci-aintc.h b/include/linux/irqchip/irq-davinci-aintc.h index 2b2ace3c1b22..ea4e087fac98 100644 --- a/include/linux/irqchip/irq-davinci-aintc.h +++ b/include/linux/irqchip/irq-davinci-aintc.h @@ -22,4 +22,6 @@ struct davinci_aintc_config { u8 *prios; }; +void davinci_aintc_init(const struct davinci_aintc_config *config); + #endif /* _LINUX_IRQ_DAVINCI_AINTC_ */ -- 2.20.1