Received: by 2002:ac0:946b:0:0:0:0:0 with SMTP id j40csp2529563imj; Mon, 11 Feb 2019 04:30:35 -0800 (PST) X-Google-Smtp-Source: AHgI3IZGPklu4eqC3WkN9BCNoM2HY4XuA2JrCoIiXOVC/SNv9f4jgCDiHwMgDCf1V8wjPvu5AEWM X-Received: by 2002:a63:c948:: with SMTP id y8mr4749254pgg.263.1549888235319; Mon, 11 Feb 2019 04:30:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1549888235; cv=none; d=google.com; s=arc-20160816; b=iC+ybQlOCOpeMP9fD5tjL+2E/8FGsJBpdRVSfpanCIeVZ9P4DUm9xF0YE96KZO6adE UWputG8sIGU5sY4zIC2E3gD1JO2vX2raAw40elRwI8ZyQ/E27pppxw5xipO6Ov2tSjA9 N7ucyBWYh5m9Lu+nbjQBtormBAV3a6vvbEFsmi1nZLhbbiz47LsQsWoNultcyrVGaOzj gbNCWcCbakMBscOasv931xphrJA9+W6Gr0WZOdroK6F2jdtmFVdkQj3rs5BZ+CWLDUER JkKJnCpu0LsP2Wb6YdsBBbf1vjMMmuNDftsSpR8eKJq9Ns/x5ajAWWSX0uSU1Q6QtaFT 7b0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=gQeA7phzsYQZFK2JLuLMFYmsphbl1nQUs0emAC/KfyA=; b=zZDi1mqdRNDTmO86WDEnkpc0Aoq7lZCCPUEV8fj0Y6SbmMBcYMWKJQbhs7UxekAdR3 8ra6ov7Nbkt3cDK1rnx9/a6UwlLesc5YdI5sGW0xuIMVSdDsFN1Sxr60ptuvLb7mZXmN Rm0dKBw6QZE9eUloNzDzGWPv1NWdN5imZEZi62VlJaFEt4YBzScSXvnsN1fhp56eqgMg NUU67nnjSVzo2LiCQ4KHYjB9QM5brclYpr6u0SmbSONKJi3Bx8CIjvZrj+JIN80NNw48 dxx1tE42RLYla6Fvnooyk7Shh7NBxKVywMgIAZcdjZcXRZue71awzcuyyBsaxWQIflL4 2zFQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=f6BueJ6B; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f3si5467601pld.358.2019.02.11.04.30.18; Mon, 11 Feb 2019 04:30:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=f6BueJ6B; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727889AbfBKM2X (ORCPT + 99 others); Mon, 11 Feb 2019 07:28:23 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:46910 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727593AbfBKM0e (ORCPT ); Mon, 11 Feb 2019 07:26:34 -0500 Received: by mail-wr1-f67.google.com with SMTP id l9so4428938wrt.13 for ; Mon, 11 Feb 2019 04:26:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gQeA7phzsYQZFK2JLuLMFYmsphbl1nQUs0emAC/KfyA=; b=f6BueJ6BOK9oLFyCBYPbIADru/jrnmkBirHhnVRLs0l0/5Bw+1U5U/CWOHGQb5EnnB 9BmjbUFDCu+lweCgRlp4R97RAiODEjMxcwFINz419QntkA4Fc2O7uJ6eZ/HQ9iOi09L3 5PTQR7GPzIRdqNGDlEY65cG/iYfeoWYIX79Kt5BycDG3IpMsg7bPQyyeCt6/jYDwJHCh HSH2WPf2929SIrhb5o+qXabEpWfP5IBP5gZQqMPTtTdzJ1cn0Fh6WBSYsQddSkbDM7ei 5kxqs+flE+vDrLUUX7chPJ9cPiBMSDcvYPcLXFOMTIhfz5DR/3GK2NQUrNMFhUl1+Brb 9zRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gQeA7phzsYQZFK2JLuLMFYmsphbl1nQUs0emAC/KfyA=; b=NDEU4Xh0Ut3jQgCMHgovnkrD0HgXsxacdOCb26js5S/RScCin1bBRRAJIzFmlwmBQ6 fzJfWDf9AmoOas6KztHOPzhpftHbifZptbCPkg+V4NESH/eY0AajWIC7QHw9Ork10KN4 f7MWwuwA6KuaKS/1kUpW2h1YD2xQPV6TXY9yCLGcv1zC1fz7Jd/HEp9AVt4+0eIHmMAX 8JTJaoSUmrXpFAECuIAp0psia9lVk5fb/QydLXyIWU1hbrE8ZbD3Ncb+NpjM/1aKldZw G73eyaJWrOOlZDQfZ/jPp6mfEle2dODU5b0xW5kwlxBx/Ns6Hd/ilT07D0swqq8VH46S Re8g== X-Gm-Message-State: AHQUAuaYQfmueePCo9f5UYxW0dTa91KlVqea6YpMQYNPs+7HEzOcJfS+ utCmGZBVWCmSW5AXDoRqTH63Yw== X-Received: by 2002:adf:eb48:: with SMTP id u8mr5036119wrn.198.1549887992073; Mon, 11 Feb 2019 04:26:32 -0800 (PST) Received: from debian-brgl.home ([2a01:cb1d:af:5b00:6d6c:8493:1ab5:dad7]) by smtp.gmail.com with ESMTPSA id l20sm19494321wrb.93.2019.02.11.04.26.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 11 Feb 2019 04:26:31 -0800 (PST) From: Bartosz Golaszewski To: Sekhar Nori , Kevin Hilman , Thomas Gleixner , Jason Cooper , Marc Zyngier , David Lechner Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [RESEND PATCH v2 15/33] ARM: davinci: aintc: use the new irqchip config structure in dm* SoCs Date: Mon, 11 Feb 2019 13:25:48 +0100 Message-Id: <20190211122606.8662-16-brgl@bgdev.pl> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190211122606.8662-1-brgl@bgdev.pl> References: <20190211122606.8662-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bartosz Golaszewski Add the new-style config structures for dm* SoCs. They will be used once we make the aintc driver stop using davinci_soc_info. Signed-off-by: Bartosz Golaszewski --- arch/arm/mach-davinci/dm355.c | 11 +++++++++++ arch/arm/mach-davinci/dm365.c | 11 +++++++++++ arch/arm/mach-davinci/dm644x.c | 11 +++++++++++ arch/arm/mach-davinci/dm646x.c | 11 +++++++++++ 4 files changed, 44 insertions(+) diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index e2b680e9944b..ff79c1a17fae 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -792,6 +793,16 @@ int __init dm355_init_video(struct vpfe_config *vpfe_cfg, return 0; } +static const struct davinci_aintc_config dm355_aintc_config = { + .reg = { + .start = DAVINCI_ARM_INTC_BASE, + .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .num_irqs = 64, + .prios = dm355_default_priorities, +}; + void __init dm355_init_irq(void) { davinci_aintc_init(); diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index 76507dcbcb3a..44dc3ca94dd3 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -1051,6 +1052,16 @@ int __init dm365_init_video(struct vpfe_config *vpfe_cfg, return 0; } +static const struct davinci_aintc_config dm365_aintc_config = { + .reg = { + .start = DAVINCI_ARM_INTC_BASE, + .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .num_irqs = 64, + .prios = dm365_default_priorities, +}; + void __init dm365_init_irq(void) { davinci_aintc_init(); diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 27c73bc54069..0b0ecac36486 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -728,6 +729,16 @@ int __init dm644x_init_video(struct vpfe_config *vpfe_cfg, return 0; } +static const struct davinci_aintc_config dm644x_aintc_config = { + .reg = { + .start = DAVINCI_ARM_INTC_BASE, + .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .num_irqs = 64, + .prios = dm644x_default_priorities, +}; + void __init dm644x_init_irq(void) { davinci_aintc_init(); diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 98fc5e3815b9..4e871d00e4e9 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -689,6 +690,16 @@ void __init dm646x_register_clocks(void) platform_device_register(&dm646x_pll2_device); } +static const struct davinci_aintc_config dm646x_aintc_config = { + .reg = { + .start = DAVINCI_ARM_INTC_BASE, + .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + .num_irqs = 64, + .prios = dm646x_default_priorities, +}; + void __init dm646x_init_irq(void) { davinci_aintc_init(); -- 2.20.1