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axentia.se; dkim=none (message not signed) header.d=none;axentia.se; dmarc=bestguesspass action=none header.from=cern.ch; Received-SPF: Pass (protection.outlook.com: domain of cern.ch designates 188.184.36.48 as permitted sender) receiver=protection.outlook.com; client-ip=188.184.36.48; helo=cernmxgwlb4.cern.ch; Received: from cernmxgwlb4.cern.ch (188.184.36.48) by AM5EUR02FT038.mail.protection.outlook.com (10.152.9.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.1580.10 via Frontend Transport; Mon, 11 Feb 2019 13:46:42 +0000 Received: from cernfe02.cern.ch (188.184.36.47) by cernmxgwlb4.cern.ch (188.184.36.48) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 11 Feb 2019 14:46:28 +0100 Received: from pcbe13614.localnet (2001:1458:202:121::100:40) by smtp.cern.ch (2001:1458:201:66::100:14) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 11 Feb 2019 14:46:27 +0100 From: Federico Vaga To: Peter Rosin Reply-To: CC: Peter Korsgaard , Andrew Lunn , "linux-i2c@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v4 3/5] i2c:ocores: add polling interface Date: Mon, 11 Feb 2019 14:46:28 +0100 Message-ID: <14487566.fPVnE3aI26@pcbe13614> In-Reply-To: <5bc1757a-3b74-5c77-7c39-00c2513683a1@axentia.se> References: <20190211083122.32485-1-federico.vaga@cern.ch> <1845501.4feNL5aF6H@pcbe13614> <5bc1757a-3b74-5c77-7c39-00c2513683a1@axentia.se> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; 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> >>> > >>> > >>> > >>> - oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN); > >>> + oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_EN); > >> > >> > >> > >> > >> You fix this up in patch 5 (in what is perhaps carelessly marketed as > >> fixes for minor checkpatch issues), but for this patch you are actually > >> no longer making sure that you clear the OCI2C_CTRL_IEN bit as the code > >> used to before this patch. I think you intended to preserve that > >> behavior, no? > > > > > > I think you got confused by the two patches because those lines look very > > > > similar. > > > > In PATCH 5 what you see is the "style fix" to clear EN and IEN before > > clock configuration > > > > in PATCH 3 (this one) what you see is when later (same function, after > > clock configuration) the device is re-enabled (EN), but without > > enabling the interrupt because on polling configuration we do not want to > > see interrupt flowing. > > > > So, the behavior is preserved for what concern clearing the IEN bit before > > clock configuration. > > > > am I wrong? > > > No, I don't think I'm confused and I think you are wrong. Current code does > this: > > u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL); > > /* make sure the device is disabled */ > oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_IEN|OCI2C_CTRL_EN)); > ... > oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN)); > > Here, the final oc_setreg always sets OCI2C_CTRL_IEN. > > Patch 3 changes it to: > > u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL); > > /* make sure the device is disabled */ > oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_IEN|OCI2C_CTRL_EN)); > ... > oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_EN)); > > Here, the final oc_setreg restores OCI2C_CTRL_IEN to whatever it was > at function entry. > > > And patch 5 changes it again to: > > u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL); > > /* make sure the device is disabled */ > ctrl &= ~(OCI2C_CTRL_IEN | OCI2C_CTRL_EN); > oc_setreg(i2c, OCI2C_CONTROL, ctrl); > ... > oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_EN)); > > Here, the final oc_setreg keeps OCI2C_CTRL_IEN cleared. I think you wanted > this deterministic behavior for patch 3 as well. Now I see what you mean and I agree. I will move the fix from PATCH 5 to PATCH 3, so that bit IEN is clearly cleared. thanks > > Cheers, > Peter