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client-ip=188.184.36.46; helo=cernmxgwlb4.cern.ch; Received: from cernmxgwlb4.cern.ch (188.184.36.46) by AM5EUR02FT042.mail.protection.outlook.com (10.152.9.106) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.1580.10 via Frontend Transport; Mon, 11 Feb 2019 16:49:23 +0000 Received: from cernfe03.cern.ch (188.184.36.39) by cernmxgwlb4.cern.ch (188.184.36.46) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 11 Feb 2019 17:49:23 +0100 Received: from cwe-513-vol689.cern.ch (188.185.69.206) by smtp.cern.ch (188.184.36.52) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 11 Feb 2019 17:49:22 +0100 From: Federico Vaga To: Peter Korsgaard , Andrew Lunn CC: Peter Rosin , , Subject: [PATCH v6 0/5] i2c: ocores: improvements Date: Mon, 11 Feb 2019 17:49:08 +0100 Message-ID: <20190211164913.5988-1-federico.vaga@cern.ch> X-Mailer: git-send-email 2.15.0 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [188.185.69.206] X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:188.184.36.46;IPV:NLI;CTRY:CH;EFV:NLI;SFV:NSPM;SFS:(10001)(10009020)(459900002);DIR:OUT;SFP:1101;SCL:1;SRVR:AM4PR0601MB2147;H:cernmxgwlb4.cern.ch;FPR:;SPF:None;LANG:en; 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[V5 -> V6] - remove redundant code introduced in V5 (double read control register) [V4 -> V5] - deterministic status of IEN bit in register "CONTROL" at the end of ocores_init() - more style fixes [V3 -> V4] - add reviews-by/tested-by - add comment to justify the formula in udelay((8 * 1000) / i2c->bus_clock_khz); [V2 -> V3] - fix particular error condition on platform_get_irq(). Copied from https://patchwork.ozlabs.org/patch/1038409/ [V1 -> V2] - replaced usleep_range() with udelay() so that the polling version can be used in atomic context. - added dedicated patch for minor style issues - fixed delay computation - use spin_lock_irqsave(), instead of spin_trylock_irqsave(). IACK is always necessary and a trylock would generate an extra interrupt for nothing - make the driver ready for an eventual master_xfer_irqless()