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[209.132.180.67]) by mx.google.com with ESMTP id j66si556841pfc.251.2019.02.13.15.00.50; Wed, 13 Feb 2019 15:01:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389551AbfBMRUy (ORCPT + 99 others); Wed, 13 Feb 2019 12:20:54 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:57678 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732218AbfBMRUy (ORCPT ); Wed, 13 Feb 2019 12:20:54 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0FD951596; Wed, 13 Feb 2019 09:20:54 -0800 (PST) Received: from brain-police (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 236643F675; Wed, 13 Feb 2019 09:20:50 -0800 (PST) Date: Wed, 13 Feb 2019 17:20:47 +0000 From: Will Deacon To: Linus Torvalds Cc: linux-arch , Linux List Kernel Mailing , "Paul E. McKenney" , Benjamin Herrenschmidt , Arnd Bergmann , Peter Zijlstra , Andrea Parri , Daniel Lustig , David Howells , Alan Stern , tony.luck@intel.com Subject: Re: [RFC PATCH] docs/memory-barriers.txt: Rewrite "KERNEL I/O BARRIER EFFECTS" section Message-ID: <20190213172047.GH6346@brain-police> References: <20190211172948.3322-1-will.deacon@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [+Tony] On Mon, Feb 11, 2019 at 02:34:31PM -0800, Linus Torvalds wrote: > On Mon, Feb 11, 2019 at 9:30 AM Will Deacon wrote: > > > > + > > + 1. All readX() and writeX() accesses to the same peripheral are ordered > > + with respect to each other. For example, this ensures that MMIO register > > + writes by the CPU to a particular device will arrive in program order. > > Hmm. I'd like more people look at strengthening this one wrt across > CPUs and locking. > > Right now we document mmiowb(), but that "documentation" is really > just a fairy tale. Very *very* few drivers actually do mmiowb() on > their own. > > IOW, we should seriously just consider making the rule be that locking > will order mmio too. Because that's practically the rule anyway. I would /love/ to get rid of mmiowb() because I think it's both extremely difficult to use and also pretty much never needed. It reminds me a lot of smp_read_barrier_depends(), which we finally pushed into READ_ONCE for Alpha. > Powerpc already does it. IO within a locked region will serialize with the > lock. I thought ia64 was the hold out here? Did they actually have machines that needed this in practice? If so, I think we can either: (a) Add an mmiowb() to their spin_unlock() code, or (b) Remove ia64 altogether if nobody complains I know that Peter has been in favour of (b) for a while... Will