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[209.132.180.67]) by mx.google.com with ESMTP id v20si633520pgb.207.2019.02.13.15.08.05; Wed, 13 Feb 2019 15:08:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404510AbfBMRqT (ORCPT + 99 others); Wed, 13 Feb 2019 12:46:19 -0500 Received: from foss.arm.com ([217.140.101.70]:58176 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729117AbfBMRqT (ORCPT ); Wed, 13 Feb 2019 12:46:19 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CCBFFA78; Wed, 13 Feb 2019 09:46:18 -0800 (PST) Received: from fuggles.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 522783F675; Wed, 13 Feb 2019 09:46:17 -0800 (PST) Date: Wed, 13 Feb 2019 17:46:08 +0000 From: Will Deacon To: Arnd Bergmann Cc: linux-arch , Linux Kernel Mailing List , andrew.murray@arm.com, Catalin Marinas , linux-riscv@lists.infradead.org, Palmer Dabbelt , Albert Ou Subject: Re: [PATCH 1/2] asm-generic/io: Pass result on inX() accessor to __io_par() Message-ID: <20190213174608.GA29100@fuggles.cambridge.arm.com> References: <20190211174544.4302-1-will.deacon@arm.com> <20190211174544.4302-2-will.deacon@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.11.1+86 (6f28e57d73f2) () Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 12, 2019 at 12:55:17PM +0100, Arnd Bergmann wrote: > On Mon, Feb 11, 2019 at 6:45 PM Will Deacon wrote: > > > > The inX() I/O accessors must enforce ordering against subsequent calls > > to the delay() routines, so that a read-back from a device can be used > > to postpone a subsequent write to the same device. > > > > On some architectures, including arm64, this ordering can only be > > achieved by creating a dependency on the value returned by the inX() > > operation, so we need to pass the value we read to the __io_par() > > macro in this case. > > > > Reported-by: Andrew Murray > > Signed-off-by: Will Deacon > > --- > > include/asm-generic/io.h | 8 ++++---- > > For changing the asm-generic file in the arm64 tree, > > Acked-by: Arnd Bergmann Thanks, Arnd. > For all I can see, this should not conflict with the usage of the > same macros on RISC-V, though it does make add a significant > difference, so I'd like to see an Ack from the RISC-V folks as > well (added to Cc), or possibly a change to arch/riscv/include/asm/io.h > to do a corresponding change. There's already a comment in that header which says that the accesses are ordered wrt timer reads, so I don't think anything needs to change there. For consistency with the macro arguments, I could augment their __io_par to take the read value as an unused argument, if that's what you mean? Will