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[209.132.180.67]) by mx.google.com with ESMTP id gn11si1953196plb.94.2019.02.14.01.43.05; Thu, 14 Feb 2019 01:43:21 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=LiZLNlqJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391077AbfBMX0b (ORCPT + 99 others); Wed, 13 Feb 2019 18:26:31 -0500 Received: from mail-pl1-f195.google.com ([209.85.214.195]:39421 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390694AbfBMX02 (ORCPT ); Wed, 13 Feb 2019 18:26:28 -0500 Received: by mail-pl1-f195.google.com with SMTP id 101so1980006pld.6 for ; Wed, 13 Feb 2019 15:26:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=z1ZzbSMaLkcrujFXMVmUGhZGSWFapd4E02x4M5Q5CXM=; b=LiZLNlqJcuFSlZ2KM8smAvyO33KbhXwgO53Y9ocn/IQrEHfKsl7H9jVO59Go8ACKKn RpH8rSh5pH8WE51+kT0jMjdtLI5kDRJZbrV/IHtguKCKxJF5bKxzC2WgOQqZvN3B2krZ s7UgOYhDmzLkbunRDxqNkUwLLMI9yMVPVNcmA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=z1ZzbSMaLkcrujFXMVmUGhZGSWFapd4E02x4M5Q5CXM=; b=JKrrWKz9uZsUCp1lcFCJOXLhS9TKfa7vwQAkk+o8qwhAQbWiJYcBUndmFST5Rxkvb2 whZmdWI618R//0a9KTLg8gyf40FulWdaYvtu81GimuYZqwuGPjs/UFq4/qgK58ffcoSL lstROgPrwk72SYSmeg8mlG15LS4PfbTv1mx86o9w9TrHOlQ0z39/60Jdq7atXc4bpf7b TJLAk849r4GeWkF5lzJeEGg4+2zimtr13cjgvrTtklGc8rg4K/nXC9cLOrZqZu8DSYgb q9BivObp0G1CuNYt2TyKiwEZMfd0jrSvmEL4lu1cB1Ao34DN6OrFwAzCJJDETZPp86n3 7K3Q== X-Gm-Message-State: AHQUAub7e9AGTECVjR55CMnqIjqDz4Pm4lIhks+LGPs6o6Z0IPAbrmtS q8pVmUzpw2pmWyuy0xaXNhSBEA== X-Received: by 2002:a17:902:8d8d:: with SMTP id v13mr740991plo.121.1550100387494; Wed, 13 Feb 2019 15:26:27 -0800 (PST) Received: from evgreen2.mtv.corp.google.com ([2620:15c:202:201:ffda:7716:9afc:1301]) by smtp.gmail.com with ESMTPSA id d129sm560660pfc.31.2019.02.13.15.26.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 Feb 2019 15:26:26 -0800 (PST) From: Evan Green To: Andy Gross , Kishon Vijay Abraham I Cc: Stephen Boyd , Marc Gonzalez , Can Guo , Vivek Gautam , Douglas Anderson , Asutosh Das , Evan Green , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , David Brown , Mark Rutland Subject: [PATCH v4 5/8] arm64: dts: msm8996: Add UFS PHY reset controller Date: Wed, 13 Feb 2019 15:25:23 -0800 Message-Id: <20190213232526.26995-6-evgreen@chromium.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190213232526.26995-1-evgreen@chromium.org> References: <20190213232526.26995-1-evgreen@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the reset controller for the UFS controller, and wire it up so that the UFS PHY can initialize itself without relying on implicit sequencing between the two drivers. Signed-off-by: Evan Green Reviewed-by: Stephen Boyd --- Changes in v4: None Changes in v3: None Changes in v2: None arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 99b7495455a6..179f1988d45c 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -663,10 +663,11 @@ clock-names = "ref_clk_src", "ref_clk"; clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, <&gcc GCC_UFS_CLKREF_CLK>; + resets = <&ufshc 0>; status = "disabled"; }; - ufshc@624000 { + ufshc: ufshc@624000 { compatible = "qcom,ufshc"; reg = <0x624000 0x2500>; interrupts = ; @@ -722,6 +723,7 @@ <0 0>; lanes-per-direction = <1>; + #reset-cells = <1>; status = "disabled"; ufs_variant { -- 2.20.1