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[209.132.180.67]) by mx.google.com with ESMTP id y62si901438pgd.465.2019.02.14.16.11.35; Thu, 14 Feb 2019 16:11:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20150623.gappssmtp.com header.s=20150623 header.b=XuxCDBvX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2439568AbfBNOxF (ORCPT + 99 others); Thu, 14 Feb 2019 09:53:05 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:39167 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2439518AbfBNOxA (ORCPT ); Thu, 14 Feb 2019 09:53:00 -0500 Received: by mail-wr1-f68.google.com with SMTP id l5so5704535wrw.6 for ; Thu, 14 Feb 2019 06:52:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DqM/kM/HaqHLmbONMvp79H2R5kq1gnK2wwY7vOs0ioE=; b=XuxCDBvXCWJb+O34mxggfJXC5IN9aM6b7wqvr7NIDh8Q4vOWnnMCYkwad28bhOUU79 TbJcUHxRWLnHWIp0j2t3jvp+cCwM+cQoXUEA/KyYh8nD4cdf5slVNonQXWT3MMIfZoON gj46m9R9S8v9sdVu4WW8fkclzTM78qgmS+Wc+OxLYp5IB7HHi3ZFZKI8Kit1Lw3lDdp9 GodFoD/ECc3KdBJazjfoLcEQZHN6EJRQBXm1dva231zxf9LiqT3FMVLKAoC+v65zP3E5 QwfKZeGZSwDb7gYEpGCGsCBoFT3Z33UKTxY86wiQJFH/kmrcPqIKvTrAsoIKLvu1/7Bn PitQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DqM/kM/HaqHLmbONMvp79H2R5kq1gnK2wwY7vOs0ioE=; b=GSjILBvSihTYaUU8a8AejkT0zG9TDDRerBg7yobAJLa+Us6sjkIyZnZxwmatBcUgFw 52QZ+NmonW41BDS0P5Kd8ZulY+PzZgQ2URJvRkSEKGijCdHo5cEkwKM1wnCBQNMLyKij ZELkVpDyCeD6/evdHup+4kskSgO0o+F/Ql4HhTG9GupuIWVXyDQZn+fSG9XqIfZM1H/n /aycAfK6FzHNw+zl4hTOWKH4kbQxMQHKRt047T9Ac9HVc7iMyRnAhaa/0rC77BeOz2qR vC4e/Cuof+M0Dk1ujoZB33pf3A3+XLePs1XIBhBuhsL5IXKcq/LtSeq2MP+GkInI6K9D Qy/g== X-Gm-Message-State: AHQUAuZwv4kVtAN5fqc4AiVTx5o0/T22fBL+JDstK8pj0DV7MDpIkaP/ 6I4VhlioQWI0FugSpRnSYbxn3w== X-Received: by 2002:a5d:434c:: with SMTP id u12mr3249080wrr.14.1550155978941; Thu, 14 Feb 2019 06:52:58 -0800 (PST) Received: from debian-brgl.home ([2a01:cb1d:af:5b00:6d6c:8493:1ab5:dad7]) by smtp.gmail.com with ESMTPSA id y20sm4181005wra.51.2019.02.14.06.52.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Feb 2019 06:52:58 -0800 (PST) From: Bartosz Golaszewski To: Dmitry Torokhov , Sekhar Nori , Kevin Hilman , Thomas Gleixner , Jason Cooper , Marc Zyngier , David Lechner Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Subject: [PATCH v4 13/37] ARM: davinci: aintc: drop the 00 prefix from register offsets Date: Thu, 14 Feb 2019 15:52:07 +0100 Message-Id: <20190214145231.8750-14-brgl@bgdev.pl> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190214145231.8750-1-brgl@bgdev.pl> References: <20190214145231.8750-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bartosz Golaszewski Since no offset goes past 0xff - let's drop the 00 prefix for better readability. While we're at it: convert all hex numbers to lower-case. Signed-off-by: Bartosz Golaszewski Reviewed-by: David Lechner --- arch/arm/mach-davinci/irq.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c index 2eb3d9b9f65f..2df91fc0dade 100644 --- a/arch/arm/mach-davinci/irq.c +++ b/arch/arm/mach-davinci/irq.c @@ -19,17 +19,17 @@ #include "irqs.h" -#define DAVINCI_AINTC_FIQ_REG0 0x0000 -#define DAVINCI_AINTC_FIQ_REG1 0x0004 -#define DAVINCI_AINTC_IRQ_REG0 0x0008 -#define DAVINCI_AINTC_IRQ_REG1 0x000C -#define DAVINCI_AINTC_IRQ_IRQENTRY 0x0014 -#define DAVINCI_AINTC_IRQ_ENT_REG0 0x0018 -#define DAVINCI_AINTC_IRQ_ENT_REG1 0x001C -#define DAVINCI_AINTC_IRQ_INCTL_REG 0x0020 -#define DAVINCI_AINTC_IRQ_EABASE_REG 0x0024 -#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x0030 -#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x004C +#define DAVINCI_AINTC_FIQ_REG0 0x00 +#define DAVINCI_AINTC_FIQ_REG1 0x04 +#define DAVINCI_AINTC_IRQ_REG0 0x08 +#define DAVINCI_AINTC_IRQ_REG1 0x0c +#define DAVINCI_AINTC_IRQ_IRQENTRY 0x14 +#define DAVINCI_AINTC_IRQ_ENT_REG0 0x18 +#define DAVINCI_AINTC_IRQ_ENT_REG1 0x1c +#define DAVINCI_AINTC_IRQ_INCTL_REG 0x20 +#define DAVINCI_AINTC_IRQ_EABASE_REG 0x24 +#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x30 +#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x4c static void __iomem *davinci_aintc_base; static struct irq_domain *davinci_aintc_irq_domain; -- 2.20.1