Received: by 2002:ac0:946b:0:0:0:0:0 with SMTP id j40csp122841imj; Thu, 14 Feb 2019 16:47:53 -0800 (PST) X-Google-Smtp-Source: AHgI3Ib1mai7ciO0+N5C5IF1TqQJKAWX0An9hgMBx3xfjgFP4HeshCIZc460zmiDyYPpjhmgPjes X-Received: by 2002:a62:be0b:: with SMTP id l11mr7198868pff.52.1550191673656; Thu, 14 Feb 2019 16:47:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550191673; cv=none; d=google.com; s=arc-20160816; b=WQRD0moLa1Q0MIBjHCZriBd6Gf2i9gpS7KELfYxDyGHC3iXArWjo6T7UAXUOybSKhX uS3dexvRL3dF+ZBijIDrgd3sAF+fCv+aoRjKQKqK42BG9sLOJJwWjuln4tcZe9n4uuvl xOnYol7qZmfkG92CI/bAh9qvXUBZjoO3xp3Stx5gRNSbZnzHytqSV5pShCRTRyTHKQUO Ao2tKMW0NU31QdzUE7BNU6QLr6VAWmn4uXZx/2/ixNb95MPXyglWXcyo0oKjZoeYiPru oHlMF0mEDMxvlovkOZxXHWKz8Adr3b/yCEhQt4EIP53yXudW2zxlojStf6ZetLJEh9Ub 06bw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=A8OXeWE/5z9/Oa8dukHqsyIX8eXR/bn8OsmrSYM6YIQ=; b=HnKaHsOFrXJehsXPCcdZGiEHgDkQbUyLdhSegSpyZHTHoebQ2up3+hP6nxVUg2DIj1 R9uDCrUCeByk5slMRKM/3cTNAjjjN02COxY9LfPGqDGZaOR3epdGZ31bBE5loMHYw5kV eSQ/sUBOaE7Xc8rMuK6Hl6aMrFpv7ZMB7Su3Tjzo7+1cVgjH4iNPGWxITAbKB1d3gqNC 5sG3969RLQ4Z2zRAaESYomz6/oOMtQarRa7INfzXA2sI/nZeahUygKTPn91r4zjJR6Wq fUqFkHFcm3ipk5nq6wkvaWP/298Ky8GfHyi73mx8SdTr/EjQ9hYHuKScaDMgw5l0yvYy 7h6g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t4si3931555pga.83.2019.02.14.16.47.37; Thu, 14 Feb 2019 16:47:53 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2502222AbfBNPlG (ORCPT + 99 others); Thu, 14 Feb 2019 10:41:06 -0500 Received: from muru.com ([72.249.23.125]:38802 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2502213AbfBNPlF (ORCPT ); Thu, 14 Feb 2019 10:41:05 -0500 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id A436380EA; Thu, 14 Feb 2019 15:41:13 +0000 (UTC) Date: Thu, 14 Feb 2019 07:41:00 -0800 From: Tony Lindgren To: Lokesh Vutla Cc: marc.zyngier@arm.com, Nishanth Menon , Santosh Shilimkar , Rob Herring , tglx@linutronix.de, jason@lakedaemon.net, Linux ARM Mailing List , linux-kernel@vger.kernel.org, Device Tree Mailing List , Sekhar Nori , Tero Kristo , Peter Ujfalusi Subject: Re: [PATCH v5 05/10] dt-bindings: irqchip: Introduce TISCI Interrupt router bindings Message-ID: <20190214154100.GB5720@atomide.com> References: <20190212074237.2875-1-lokeshvutla@ti.com> <20190212074237.2875-6-lokeshvutla@ti.com> <20190212162247.GK5720@atomide.com> <6a274588-0fb6-2ddf-3bcc-f9e4d849ac07@ti.com> <20190213152620.GS5720@atomide.com> <4791de04-63af-4c5e-db9c-47634fcb8dc9@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4791de04-63af-4c5e-db9c-47634fcb8dc9@ti.com> User-Agent: Mutt/1.11.2 (2019-01-07) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Lokesh Vutla [190214 08:39]: > IMHO, device ids are something which can be used in DT. There are many other > things like the interrupt ranges etc.. which are discoverable from sysfw and we > are implementing it. We need to describe hardware in the device tree, not firmware. If you have something discoverable from the firmware, you should have the device driver query it from sysfw based on a hardware property, not based on some invented enumeration in the firmware. If there is some device to firmware translation needed, hide that into the device driver and keep it out of the device tree. For example, look at the interrupt binding where the interrupt is phandle to the controller and the bit offset from the interrupt controller instance. You need to use device IO address + bit offset (or register offset) type indexing for device tree here. Something out of the TRM that makes sense to developers. Regards, Tony