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[209.132.180.67]) by mx.google.com with ESMTP id r10si271933pgk.234.2019.02.14.17.00.04; Thu, 14 Feb 2019 17:00:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2394143AbfBNRAd (ORCPT + 99 others); Thu, 14 Feb 2019 12:00:33 -0500 Received: from ale.deltatee.com ([207.54.116.67]:36462 "EHLO ale.deltatee.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727997AbfBNRAd (ORCPT ); Thu, 14 Feb 2019 12:00:33 -0500 Received: from cgy1-donard.priv.deltatee.com ([172.16.1.31]) by ale.deltatee.com with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1guKNC-0004Pd-Uf; Thu, 14 Feb 2019 10:00:32 -0700 Received: from gunthorp by cgy1-donard.priv.deltatee.com with local (Exim 4.89) (envelope-from ) id 1guKNC-0007G7-Fl; Thu, 14 Feb 2019 10:00:30 -0700 From: Logan Gunthorpe To: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Bjorn Helgaas Cc: Kit Chow , Logan Gunthorpe , Yinghai Lu Date: Thu, 14 Feb 2019 10:00:27 -0700 Message-Id: <20190214170028.27862-1-logang@deltatee.com> X-Mailer: git-send-email 2.19.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 172.16.1.31 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, bhelgaas@google.com, kchow@gigaio.com, logang@deltatee.com, yinghai@kernel.org X-SA-Exim-Mail-From: gunthorp@deltatee.com X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on ale.deltatee.com X-Spam-Level: X-Spam-Status: No, score=-8.7 required=5.0 tests=ALL_TRUSTED,BAYES_00, GREYLIST_ISWHITE,MYRULES_NO_TEXT autolearn=ham autolearn_force=no version=3.4.2 Subject: [PATCH 1/2] PCI: Prevent 64-bit resources from being counted in 32-bit bridge region X-SA-Exim-Version: 4.2.1 (built Tue, 02 Aug 2016 21:08:31 +0000) X-SA-Exim-Scanned: Yes (on ale.deltatee.com) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When using the pci=realloc command line argument, with hpmemsize not equal to zero, some hierarchies of 32-bit resources can fail to be assigned in some situations. When this happens, the user will see some PCI BAR resources being ignored and some PCI Bridge windows being left unset. In lspci this may look like: Memory behind bridge: fff00000-000fffff or Region 0: Memory at (32-bit, non-prefetchable) [size=256K] Ignored BARs mean the underlying device will not be usable. The possible situations where this can happen will be quite varied and depend highly on the exact hierarchy and how the realloc code ends up trying to assign the regions. It's known to at least require a large 64-bit BAR (>1GB) below a PCI bridge. The cause of this bug is in __pci_bus_size_bridges() which tries to calculate the total resource space required for each of the bridge windows (typically IO, 64-bit, and 32-bit / non-prefetchable). The code, as written, tries to allocate all the 64-bit prefetchable resources followed by all the remaining resources. It uses two calls to pbus_size_mem() for this. If the first call to pbus_size_mem() fails it tries to fit all resources into the 32-bit bridge window and it expects the size of the 32-bit bridge window to be multiple GBs which will never be assignable under the 4GB limit imposed on it. There are only two reasons for pbus_size_mem() to fail: if there is no 64-bit/prefetchable bridge window, or if that window is already assigned (in other words, its resource already has a parent set). We know the former case can't be true because, in __pci_bus_size_bridges(), it's existence is checked before making the call. So if the pbus_size_mem() call in question fails, the window must already be assigned, and in this case, we still do not want 64-bit resources trying to be sized into the 32-bit catch-all resource. So to fix the bug, we must always set mask, type2 and type3 in cases where a 64-bit resource exists even if pbus_size_mem() fails. Reported-by: Kit Chow Fixes: 5b28541552ef ("PCI: Restrict 64-bit prefetchable bridge windows to 64-bit resources") Signed-off-by: Logan Gunthorpe Cc: Bjorn Helgaas Cc: Yinghai Lu --- drivers/pci/setup-bus.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index ed960436df5e..56b7077f37ff 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -1265,21 +1265,20 @@ void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head) prefmask = IORESOURCE_MEM | IORESOURCE_PREFETCH; if (b_res[2].flags & IORESOURCE_MEM_64) { prefmask |= IORESOURCE_MEM_64; - ret = pbus_size_mem(bus, prefmask, prefmask, + pbus_size_mem(bus, prefmask, prefmask, prefmask, prefmask, realloc_head ? 0 : additional_mem_size, additional_mem_size, realloc_head); /* - * If successful, all non-prefetchable resources - * and any 32-bit prefetchable resources will go in - * the non-prefetchable window. + * Given the existence of a 64-bit resource for this + * bus, all non-prefetchable resources and any 32-bit + * prefetchable resources will go in the + * non-prefetchable window. */ - if (ret == 0) { - mask = prefmask; - type2 = prefmask & ~IORESOURCE_MEM_64; - type3 = prefmask & ~IORESOURCE_PREFETCH; - } + mask = prefmask; + type2 = prefmask & ~IORESOURCE_MEM_64; + type3 = prefmask & ~IORESOURCE_PREFETCH; } /* -- 2.19.0